Nexperia USA Inc. PUMD10/ZLX
- Part No.:
- PUMD10/ZLX
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Bipolar Transistor Arrays, Pre-Biased
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
PUMD10/ZLX.pdf
- Description:
- TRANS PREBIAS
- Quantity:
- Payment:

- Shipping:

Inventory:5,625
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Product details
Overview
PUMD10/ZLX from Nexperia is a resistor-equipped double transistor (RET) integrating one NPN and one PNP bipolar junction transistor in a single SOT363-3 (SC-88) package, rated for 50 V VCEO, 100 mA output current per transistor, with built-in bias resistors R1 = 2.2 kΩ and R2 = 47 kΩ. It serves as a compact logic-level interface device for bidirectional signal conditioning in space-constrained digital control circuits.
For engineers reviewing the PUMD10/ZLX datasheet, PUMD10/ZLX pinout, PUMD10/ZLX application, or PUMD10/ZLX equivalent, this device is selected for low-current peripheral driver roles where reduced component count, simplified base-drive design, and dual-polarity switching capability are required - especially in I/O expansion, level translation, and discrete gate driving.
Technical Context
The PUMD10/ZLX implements two monolithically integrated BJT die - TR1 (NPN) and TR2 (PNP) - each with dedicated on-chip bias networks: R1 connects input to base, R2 connects base to emitter, forming a classic resistor-equipped transistor topology. The R2/R1 ratio of 21 (typ.) enables predictable DC biasing without external components.
Its dual-transistor configuration supports complementary switching: TR1 sinks current when driven high (NPN), TR2 sources current when driven low (PNP), enabling push-pull-like behavior in open-collector/open-emitter configurations. Thermal resistance is 417 K/W (per device, FR4 PCB), supporting operation up to 150 °C junction temperature.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | 50 V - Maximum safe collector-emitter voltage before breakdown; defines rail compatibility with 3.3 V/5 V/12 V logic systems. |
| IO | 100 mA - Continuous output current per transistor; sufficient for LED drivers, small relays, and logic buffer loads. |
| R1 | 2.2 kΩ - Input bias resistor value; sets base current magnitude for predictable turn-on at standard logic-high voltages. |
| R2/R1 | 21 - Fixed internal resistor ratio; determines base-emitter feedback strength and improves noise immunity vs. bare transistors. |
| hFE | 100 - Minimum DC current gain at VCE = 5 V, IC = 10 mA; ensures reliable saturation with modest base drive. |
| VCE(sat) | 100 mV - Collector-emitter saturation voltage at IC = 5 mA, IB = 0.25 mA; minimizes power loss in switching applications. |
| fT (TR1) | 230 MHz - Transition frequency of NPN transistor; supports switching up to ~10–20 MHz with adequate gain margin. |
| Ptot | 300 mW - Maximum total power dissipation on FR4 PCB; constrains simultaneous conduction duty cycle in dual-transistor use. |
Pinout & Package
Package: SOT363-3 (SC-88), 6-pin TSSOP surface-mount plastic package with 0.65 mm pitch, 2.2 mm × 1.35 mm footprint, and thermal pad-compatible layout.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | GND1 | Emiter connection for TR1 (NPN); common reference node for first transistor's current path. |
| 2 | I1 | Input/base terminal for TR1 (NPN); accepts logic-high signal to activate sink output at Pin 6. |
| 3 | O2 | Collector output for TR2 (PNP); provides sourcing capability when Pin 5 is pulled low. |
| 4 | GND2 | Emiter connection for TR2 (PNP); independent ground return for second transistor's current path. |
| 5 | I2 | Input/base terminal for TR2 (PNP); accepts logic-low signal (relative to GND2) to activate source output at Pin 3. |
| 6 | O1 | Collector output for TR1 (NPN); provides sinking capability when Pin 2 is driven high. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-polarity integration | Single-package NPN+PNP pairing eliminates inter-device timing skew and layout mismatch in complementary switching paths. |
| Built-in bias network | Fixed R1 = 2.2 kΩ and R2 = 47 kΩ eliminate need for external base resistors, reducing BOM count by ≥4 passive parts per channel. |
| Logic-compatible input thresholds | VI(on) = 0.75 V (TR1), VI(off) = 0.6 V (TR1); ensures robust recognition of standard CMOS/TTL logic levels without level-shifting. |
| Low saturation voltage | VCE(sat) ≤ 100 mV at 5 mA enables <1 mW conduction loss per transistor - critical for battery-powered I/O interfaces. |
| Thermal derating support | 417 K/W junction-to-ambient resistance on FR4 allows sustained 100 mA operation below 85 °C ambient with no heatsink. |
Applications
| LED Indicator Driver | Microcontroller GPIO Expander |
|---|---|
Use Scenario: Driving multiple status LEDs from a microcontroller with limited I/O drive strength and no dedicated LED driver peripherals. IC Role / Device Role / Timing Role: Acts as a dual-channel level-shifting current sink (TR1) and source (TR2) to interface MCU GPIOs with common-anode and common-cathode LED configurations. Use Value: Enables bidirectional LED control using only two GPIO pins (I1/I2), eliminating need for separate NPN/PNP discrete pairs and saving ≥6 mm² PCB area per channel. | Use Scenario: Extending digital I/O capability of an ARM Cortex-M0+ MCU in a sensor hub design where all native GPIOs are allocated to analog inputs and communication buses. IC Role / Device Role / Timing Role: Functions as a programmable logic buffer with configurable sink/source polarity, allowing software-defined I/O direction without hardware rework. Use Value: Provides 2 additional robust 100 mA I/O lines per device, compatible with 1.8 V–5 V logic families and tolerant of ±12 V transient input conditions. |
| Industrial Digital Input Conditioning | Legacy Logic Interface Adapter |
Use Scenario: Converting 24 V industrial PLC digital inputs into clean 3.3 V logic signals for an isolated microcontroller subsystem. IC Role / Device Role / Timing Role: Serves as a high-impedance voltage translator and current limiter, using TR1's input threshold and built-in R1 to scale and condition incoming signals. Use Value: Replaces discrete Zener + resistor + transistor circuits with a single 2.2 mm × 1.35 mm component, reducing input stage BOM by 75% and improving ESD robustness via integrated structure. | Use Scenario: Interfacing vintage 5 V TTL logic outputs (e.g., 74LS series) with modern 1.8 V FPGA I/O banks requiring level translation and current buffering. IC Role / Device Role / Timing Role: Operates as a unidirectional level translator with active pull-up/pull-down capability, leveraging TR2's sourcing and TR1's sinking behavior. Use Value: Delivers sub-10 ns propagation delay variation between channels and maintains signal integrity across 0–20 MHz data rates without external compensation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar resistor-equipped transistor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PUMB10 | PNP/PNP dual RET; same package, identical R1/R2 values, but both transistors are PNP. | Suitable only for sourcing-only applications (e.g., dual high-side switches); lacks NPN sink capability. | Select when both outputs must source current and share common emitter reference. |
| PUMH10 | NPN/NPN dual RET; same package and bias network, but both transistors are NPN. | Optimized for dual-sink applications (e.g., LED matrix row drivers); no sourcing functionality. | Choose when both outputs require sinking behavior and shared emitter grounding is preferred. |
Compared with PUMB10 and PUMH10, the PUMD10/ZLX uniquely supports mixed-sink-and-source operation in one package - enabling true bidirectional I/O control without cross-coupling or external inversion logic, making it optimal for GPIO expansion and dynamic load switching.
Availability
PUMD10/ZLX is available at Aetrix Electronics and suitable for industrial control interfaces, embedded sensor hubs, and consumer electronics I/O expansion requiring stable component supply, long-term manufacturability, and RoHS-compliant packaging.
Supply support for PUMD10/ZLX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability essential semiconductors - including logic, discretes, MOSFETs, and ESD protection devices - serving automotive, industrial, and consumer markets.
The PUMD10/ZLX belongs to Nexperia's Resistor-Equipped Transistor (RET) product line, engineered specifically to replace legacy discrete BJT + resistor combinations in cost- and space-sensitive digital interface applications.
FAQ
What is the maximum operating temperature for PUMD10/ZLX?
The PUMD10/ZLX has a maximum junction temperature (Tj) of 150 °C and operates across an ambient temperature range of −65 °C to +150 °C. On a standard FR4 PCB with single-sided copper, its thermal resistance is 417 K/W, meaning it can sustain full 100 mA output at up to 85 °C ambient without exceeding Tj limits.
Can PUMD10/ZLX be used in analog amplifier configurations?
No - the PUMD10/ZLX is not designed for linear amplification. Its built-in bias resistors fix the DC operating point, and its hFE and fT specifications are optimized for switching, not small-signal gain stability. Use dedicated general-purpose transistors (e.g., BC847) for analog amplifier stages.
Is there a recommended PCB footprint for reflow soldering?
Yes - Nexperia specifies a reflow footprint for SOT363-3 with 0.6 mm pad length, 0.4 mm pad width, 0.5 mm spacing between pads, and 2.65 mm × 2.35 mm overall land pattern. This matches JEDEC MO-178 standards and ensures reliable solder joint formation under standard lead-free reflow profiles.
How does the R2/R1 ratio affect switching behavior?
The R2/R1 ratio of 21 establishes strong base-emitter feedback, increasing input impedance and improving noise immunity during logic transitions. It also reduces sensitivity to hFE variation across temperature and process corners, ensuring consistent turn-on/off thresholds from −40 °C to +125 °C without external trimming.
PUMD10/ZLX Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Transistor Type:
- 1 NPN, 1 PNP - Pre-Biased (Dual)
- Current - Collector (Ic) (Max):
- 100mA
- Voltage - Collector Emitter Breakdown (Max):
- 50V
- Resistor - Base (R1):
- 2.2kOhms
- Resistor - Emitter Base (R2):
- 47kOhms
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 100 @ 10mA, 5V
- Vce Saturation (Max) @ Ib, Ic:
- 100mV @ 250µA, 5mA
- Current - Collector Cutoff (Max):
- 100nA
- Frequency - Transition:
- 230MHz, 180MHz
- Power - Max:
- 300mW
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSSOP
PUMD10/ZLX FAQ
1.How can I place an order for PUMD10/ZLX through Aetrix?
Please submit a Request for Quotation (RFQ) for PUMD10/ZLX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PUMD10/ZLX reliable?
The price and inventory of PUMD10/ZLX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PUMD10/ZLX is usually 5 days.
3.What payment methods are accepted for PUMD10/ZLX?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PUMD10/ZLX transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PUMD10/ZLX?
PUMD10/ZLX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PUMD10/ZLX order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PUMD10/ZLX?
For technical support, including PUMD10/ZLX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PUMD10/ZLX requirements.
6.How does Aetrix verify that PUMD10/ZLX is sourced from the original manufacturer or authorized distributors?
All PUMD10/ZLX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PUMD10/ZLX meets industry standards.
7.What is the process for return or replacement of PUMD10/ZLX?
All PUMD10/ZLX units undergo pre-shipment inspection (PSI). If there is an issue with PUMD10/ZLX, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PUMD10/ZLX part is unused and in its original packaging.
Return procedure for PUMD10/ZLX:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PUMD10/ZLX Tags

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