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Nexperia USA Inc. PUMD15,115

Part No.:
PUMD15,115
Manufacturer:
Nexperia USA Inc.
Category:
Bipolar Transistor Arrays, Pre-Biased
Package:
6-TSSOP, SC-88, SOT-363
Datasheet:
AetrixPUMD15,115.pdf
Description:
TRANS PREBIAS 1NPN 1PNP 6TSSOP
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:10,927

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Product details

Overview

PUMD15 from Nexperia is an AEC-Q101-qualified NPN/PNP resistor-equipped double transistor (RET) in SOT363-3 (SC-88) package, featuring integrated 4.7 kΩ input bias resistors per channel, 50 V VCEO, and 100 mA output current capability - used for bidirectional digital signal conditioning in space-constrained automotive and industrial control interfaces.

For engineers reviewing the PUMD15 datasheet, PUMD15 pinout, PUMD15 application, or PUMD15 equivalent, this device serves as a drop-in replacement for discrete NPN+PNP pairs in level-shifting, bus termination, and low-current peripheral driver circuits where board area, BOM count, and thermal reliability are critical.

Technical Context

The PUMD15 integrates two monolithically matched transistors - TR1 (NPN) and TR2 (PNP) - each with dedicated on-die R1 and R2 bias resistors configured to enable direct logic-level drive without external base resistors. Its dual-polarity architecture supports complementary switching in push-pull or inverter configurations.

Each transistor operates independently with verified DC current gain (hFE ≥ 30 at IC = 10 mA), saturation voltage ≤ 150 mV, and transition frequencies of 230 MHz (NPN) and 180 MHz (PNP), enabling reliable operation up to medium-speed digital switching (≤ 10 MHz).

Key Specifications

Parameter Value and Actual Design Meaning
VCEO 50 V - Maximum collector-emitter voltage before breakdown; enables use in 24 V industrial bus and 12 V automotive domains.
IO 100 mA - Continuous output current per transistor; sufficient for driving LEDs, small relays, and logic inputs.
R1 4.7 kΩ ±28% - Integrated input bias resistor; eliminates need for external base resistors in standard 3.3 V/5 V logic interfacing.
hFE ≥30 - Minimum DC current gain at VCE = 5 V, IC = 10 mA; ensures predictable switching with low drive current.
VCE(sat) ≤150 mV - Collector-emitter saturation voltage at IC/IB = 20; minimizes power loss and self-heating in high-duty-cycle operation.
fT (TR1) 230 MHz - Transition frequency for NPN transistor; supports clean edge integrity in ≤10 MHz digital signal routing.
Ptot (device) 300 mW - Total power dissipation at Tamb ≤ 25 °C on FR4 PCB; defines thermal derating envelope for sustained operation.

Pinout & Package

SOT363-3 (TSSOP6) plastic surface-mounted package: 2.2 mm × 1.35 mm footprint, 0.65 mm pitch, 0.95 mm max height, optimized for automated placement and reflow soldering on dense PCBs.

Pin/Terminal Circuit Role Design Meaning
1 GND1 Emiter connection for TR1 (NPN); common reference node for first transistor's current path.
2 I1 Base input for TR1 (NPN); accepts logic-high signal directly via internal R1 resistor.
3 O2 Collector output for TR2 (PNP); active-low switching node when TR2 is enabled.
4 GND2 Emiter connection for TR2 (PNP); independent ground return for second transistor.
5 I2 Base input for TR2 (PNP); accepts logic-low signal directly via internal R1 resistor.
6 O1 Collector output for TR1 (NPN); active-high switching node when TR1 is enabled.

Key Features

Feature Design Value
AEC-Q101 qualification Validated for automotive-grade temperature cycling (-40 °C to +125 °C), vibration, and ESD robustness per ISO 16750.
Integrated R1/R2 bias network 4.7 kΩ ±28% per channel; enables single-resistor logic interface and eliminates layout sensitivity to stray capacitance.
Reduced component count Replaces two discrete transistors + four external base resistors; cuts BOM line items and placement time by >60%.
Thermal resistance (j-a) 417 K/W per device on FR4 PCB; supports stable operation up to 85 °C ambient without heatsinking.
Complementary RET pairing NPN/PNP topology allows true push-pull output stages without cross-conduction risk in level translation.

Applications

Automotive Door Module Driver Industrial PLC Input Buffer

Use Scenario: Driving window lift motor direction control signals from MCU GPIO in compact door module PCBs.

IC Role / Device Role / Timing Role: Bidirectional level translator and current amplifier between 3.3 V MCU and 12 V load interface.

Use Value: Eliminates discrete transistor pair + resistor network, reducing footprint by 45% while maintaining AEC-Q101 compliance.

Use Scenario: Conditioning 24 V dry-contact inputs into 5 V logic levels for microcontroller-based PLC input cards.

IC Role / Device Role / Timing Role: Input stage signal conditioner with built-in pull-up/pull-down biasing and noise immunity.

Use Value: Enables direct connection to field wiring without external biasing components; improves EMI rejection via matched internal resistors.

USB-C Port Power Switch Control IoT Sensor Node Level Shifter

Use Scenario: Enabling/disabling USB-C VBUS power path using dual-control logic (enable + invert-enable) in portable chargers.

IC Role / Device Role / Timing Role: Complementary switch driver for high-side and low-side MOSFET gate control.

Use Value: Provides matched turn-on/turn-off timing between NPN and PNP channels, minimizing shoot-through risk during state transitions.

Use Scenario: Interfacing 1.8 V sensor outputs to 3.3 V host MCU in battery-powered environmental monitoring nodes.

IC Role / Device Role / Timing Role: Low-power bidirectional voltage translator with <100 nA leakage and sub-μs propagation delay.

Use Value: Delivers rail-to-rail logic compatibility with <2.5 pF collector capacitance, preserving signal integrity at 1–5 MHz sampling rates.

Equivalent & Alternatives

The following parts are listed as comparable options for similar resistor-equipped transistor applications.

Alternative Part Technical Difference Application Difference Selection Advice
PUMH15 NPN/NPN configuration; identical R1/R2 values and package but lacks PNP channel. Suitable only for unidirectional or parallel-output applications requiring dual NPNs. Select when both outputs must sink current or share common emitter reference.
PUMB15 PNP/PNP configuration; same bias resistors and thermal specs but no NPN channel. Applicable only in high-side switching or active-low logic fanout scenarios. Choose when both outputs must source current or require negative logic polarity.

Compared with PUMH15 and PUMB15, the PUMD15 uniquely provides complementary NPN/PNP switching in one die - essential for push-pull drivers, inverter stages, and bidirectional bus control where polarity inversion and matched timing are required.

Availability

PUMD15 is available at Aetrix Electronics and suitable for automotive body electronics, industrial PLC input modules, and IoT sensor interface designs requiring stable component supply, long-term lifecycle support, and AEC-Q101-compliant performance.

Supply support for PUMD15 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic devices, with leadership in automotive-qualified components and advanced packaging technologies.

The PUMD15 belongs to Nexperia's Resistor-Equipped Transistor (RET) product line, engineered specifically for reducing design complexity and board space in automotive and industrial digital interface circuits.

FAQ

What is the maximum operating junction temperature for PUMD15?

The absolute maximum junction temperature (Tj) is 150 °C, validated per IEC 60134 limiting values. Derating begins above 25 °C ambient, with total device power dissipation dropping linearly to zero at 125 °C ambient on FR4 PCB - confirmed by Figure 1 in the datasheet.

Can PUMD15 replace discrete BC847/BC857 pairs in existing designs?

Yes - PUMD15 matches BC847 (NPN) and BC857 (PNP) electrical characteristics including VCEO, hFE, and VCE(sat), while integrating bias resistors. Pin mapping differs (SOT363-3 vs. SOT23), so PCB layout revision is required, but schematic changes are minimal or unnecessary.

Is the R1/R2 ratio truly 1:1, and how tightly is it controlled?

R2/R1 ratio is specified as 0.8 to 1.2 (typical 1.0), measured under defined test conditions per Table 8. This tolerance ensures consistent biasing across temperature and process variation, supporting reliable logic-level switching without external trimming.

Does PUMD15 support 1.8 V logic input drive?

No - VI(on) is specified at 1.9 V (typ) for TR1 and −1.9 V (typ) for TR2, with minimum on-state input voltage of 2.5 V (TR1) and −2.5 V (TR2). It is not guaranteed to switch reliably below 2.5 V logic thresholds; use PUMD3,4 or PMMD15 for 1.8 V compatibility.

PUMD15,115 Specifications

Product attributes
Attribute value
Manufacturer:
Nexperia USA Inc.
Series:
-
Package/Case:
6-TSSOP, SC-88, SOT-363
Packaging:
Tape & Reel (TR)
Product Status:
Active
Transistor Type:
1 NPN, 1 PNP - Pre-Biased (Dual)
Current - Collector (Ic) (Max):
100mA
Voltage - Collector Emitter Breakdown (Max):
50V
Resistor - Base (R1):
4.7kOhms
Resistor - Emitter Base (R2):
4.7kOhms
DC Current Gain (hFE) (Min) @ Ic, Vce:
30 @ 10mA, 5V
Vce Saturation (Max) @ Ib, Ic:
150mV @ 500µA, 10mA
Current - Collector Cutoff (Max):
1µA
Frequency - Transition:
-
Power - Max:
300mW
Grade:
Automotive
Qualification:
AEC-Q100
Mounting Type:
Surface Mount
Supplier Device Package:
6-TSSOP

PUMD15,115 FAQ

1.How can I place an order for PUMD15,115 through Aetrix?

Please submit a Request for Quotation (RFQ) for PUMD15,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for PUMD15,115 reliable?

The price and inventory of PUMD15,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PUMD15,115 is usually 5 days.

3.What payment methods are accepted for PUMD15,115?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PUMD15,115 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for PUMD15,115?

PUMD15,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your PUMD15,115 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for PUMD15,115?

For technical support, including PUMD15,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PUMD15,115 requirements.

6.How does Aetrix verify that PUMD15,115 is sourced from the original manufacturer or authorized distributors?

All PUMD15,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PUMD15,115 meets industry standards.

7.What is the process for return or replacement of PUMD15,115?

All PUMD15,115 units undergo pre-shipment inspection (PSI). If there is an issue with PUMD15,115, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The PUMD15,115 part is unused and in its original packaging.

Return procedure for PUMD15,115:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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