My Inquiry
My Account
Nexperia USA Inc. PUMD17,115
- Part No.:
- PUMD17,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Bipolar Transistor Arrays, Pre-Biased
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
PUMD17,115.pdf
- Description:
- TRANS PREBIAS 1NPN 1PNP 6TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:29
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PUMD17 from Nexperia is a dual NPN/PNP resistor-equipped transistor (RET) in SOT363 (SC-88) package, integrating one NPN and one PNP transistor with built-in bias resistors R1 = 47 kΩ and R2 = 22 kΩ. It supports ±50 V collector-emitter voltage, 100 mA DC output current per transistor, and operates across −65 °C to +150 °C ambient range - used for compact logic-level signal inversion and IC input control in space-constrained digital interface circuits.
For engineers reviewing the PUMD17 datasheet, PUMD17 pinout, PUMD17 application, or PUMD17 equivalent, this device serves as a drop-in replacement for discrete BJT + resistor combinations in low-current peripheral drivers, bus interface level-shifting, and dual-polarity signal conditioning where board area and assembly cost are critical.
Technical Context
The PUMD17 integrates two complementary transistors on a single die: TR1 (NPN) and TR2 (PNP), each with monolithically embedded base bias resistors (R1 and R2). The R2/R1 ratio of 0.47 enables predictable saturation behavior under standard TTL/CMOS drive conditions.
Each transistor features independent emitter-grounded configuration (Pins 1 & 4), base-driven inputs (Pins 2 & 5), and collector outputs (Pins 3 & 6), supporting push-pull or complementary switching without external bias networks. Thermal resistance is 416 K/W per device at Tamb ≤ 25 °C on FR4 PCB.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | 50 V - Maximum safe collector-emitter voltage with open base; defines rail compatibility up to ±50 V systems. |
| IO (DC) | 100 mA - Continuous output current per transistor; sufficient for driving LEDs, small relays, or logic inputs. |
| R1 | 47 kΩ (33–61 kΩ) - Input bias resistor enabling direct CMOS/TTL-level drive without external pull-up/down. |
| R2/R1 | 0.47 (0.37–0.57) - Fixed feedback ratio ensuring stable saturation and predictable turn-on threshold. |
| VCE(sat) | 150 mV @ IC = 10 mA, IB = 0.5 mA - Low saturation voltage minimizes power loss in switching applications. |
| hFE | 60 min @ VCE = 5 V, IC = 5 mA - Guaranteed DC current gain ensures reliable switching margin with standard logic drive. |
| Ptot (device) | 300 mW @ Tamb ≤ 25 °C - Total dissipation limit for both transistors combined on SOT363 footprint. |
Pinout & Package
SOT363 (SC-88) 6-pin plastic surface-mount package with 0.65 mm pitch, 2.2 mm × 1.8 mm body, and exposed thermal pad not present. Standard JEDEC outline compliant with reflow soldering only.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | GND (emitter) TR1 | NPN emitter reference node; common ground connection for first transistor. |
| 2 | input (base) TR1 | NPN base terminal with integrated R1–R2 network; accepts logic-high input to activate TR1. |
| 3 | output (collector) TR2 | PNP collector output; sinks current when TR2 is active (complementary to TR1). |
| 4 | GND (emitter) TR2 | PNP emitter reference node; tied to system ground, enabling high-side switching capability. |
| 5 | input (base) TR2 | PNP base terminal with same R1–R2 network; driven low to activate TR2 in inverting configuration. |
| 6 | output (collector) TR1 | NPN collector output; sources current when TR1 is active (low-side switch). |
Key Features
| Feature | Design Value |
|---|---|
| Built-in bias resistors (R1 = 47 kΩ, R2 = 22 kΩ) | Eliminates need for four external resistors in dual-transistor inverter or phase-splitter designs. |
| Complementary NPN/PNP pair in single package | Enables compact push-pull output stages or bidirectional level translation without layout mismatch. |
| 100 mA DC output rating per transistor | Supports direct drive of small-signal loads like optocouplers, LED indicators, or gate inputs. |
| −65 °C to +150 °C operating temperature range | Validated for automotive under-hood and industrial control environments with no derating below 125 °C. |
| 416 K/W junction-to-ambient thermal resistance (per device) | Allows full 300 mW power dissipation on standard FR4 PCB without heatsinking or airflow. |
Applications
| Logic-Level Signal Inversion | Dual-Polarity Peripheral Driver |
|---|---|
|
Use Scenario: Converting 3.3 V or 5 V microcontroller GPIO outputs into inverted logic signals for interfacing with legacy TTL or mixed-voltage subsystems. IC Role / Device Role / Timing Role: Dual RET acts as a compact, resistorless inverter stage with matched propagation delay between NPN and PNP paths. Use Value: Reduces BOM count by 4 resistors and saves 3.96 mm² PCB area versus discrete implementation while maintaining <100 ns switching. |
Use Scenario: Driving bidirectional data lines (e.g., I²C pull-up/down control, RS-232 level translation) requiring simultaneous sourcing and sinking capability. IC Role / Device Role / Timing Role: TR1 (NPN) sinks current during low state; TR2 (PNP) sources current during high state - forming a true push-pull buffer. Use Value: Enables rail-to-rail output swing with <150 mV saturation drop, eliminating need for external MOSFETs or dedicated level translators. |
| Compact Bus Interface Buffer | Low-Power Sensor Interface Stage |
|
Use Scenario: Isolating and buffering SPI or UART signals between MCU and peripheral ICs in portable medical or wearables devices. IC Role / Device Role / Timing Role: Acts as a current-gain-enhanced buffer with built-in bias, reducing capacitive loading on driving pins. Use Value: Maintains signal integrity at 10 MHz clock rates while consuming <1 µA quiescent current in off-state due to high R1 value. |
Use Scenario: Conditioning analog sensor outputs (e.g., thermistor divider, Hall-effect switch) before ADC input in battery-powered IoT nodes. IC Role / Device Role / Timing Role: TR1 amplifies weak sensor signals; TR2 provides active pull-down for fast discharge of RC time constants. Use Value: Achieves 10-bit linearity over 0–85 °C using only one device, avoiding op-amp power overhead and trimming components. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual RET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| EMX11T2R | R1 = 100 kΩ, R2 = 100 kΩ; higher input impedance but lower drive strength (IO = 50 mA). | Better suited for ultra-low-power sleep-mode interfaces; less suitable for 100 mA loads. | Select when minimizing standby current outweighs output current requirements. |
| PDTC143ZS | Single NPN RET (no PNP); R1 = 47 kΩ, R2 = 10 kΩ; R2/R1 = 0.21 - optimized for saturated switching, not linear operation. | Lacks complementary output; requires separate PNP device for push-pull use. | Choose only for unidirectional low-side switching where space allows second discrete component. |
Compared with EMX11T2R and PDTC143ZS, PUMD17 uniquely delivers matched NPN/PNP performance with 100 mA drive and 0.47 R2/R1 ratio - making it the only single-package solution for compact, bidirectional digital interface buffering without design compromise.
Availability
PUMD17 is available at Aetrix Electronics and suitable for industrial control panels, automotive body electronics, and consumer IoT gateway designs requiring stable component supply and long-term manufacturing continuity.
Supply support for PUMD17 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global leader in discrete, logic, and PowerMOS semiconductors, spun off from NXP's Standard Products division in 2017 and headquartered in Nijmegen, Netherlands.
PUMD17 belongs to Nexperia's resistor-equipped transistor (RET) portfolio, engineered specifically for reducing component count and PCB area in digital interface and peripheral driver applications across automotive, industrial, and computing markets.
FAQ
What is the maximum allowable input voltage at Pin 2 (TR1 base) and Pin 5 (TR2 base)?
Pin 2 (TR1 base) accepts up to +40 V positive input and −10 V negative input; Pin 5 (TR2 base) accepts up to +10 V positive and −40 V negative input. These limits ensure safe bias network operation without forward-biasing internal junctions beyond rated values, as verified in Table 6 of the 2005 datasheet.
Can PUMD17 be used in linear amplifier configurations?
No - PUMD17 is characterized and specified only for switching operation. Its hFE is guaranteed minimum 60 at IC = 5 mA, but no linearity, frequency response, or small-signal parameters (e.g., fT, Cob) are provided in the datasheet. It lacks design validation for analog gain stages.
Is the SOT363 package lead-free and RoHS-compliant?
Yes - all PUMD17 variants manufactured after the 2017 Nexperia transition comply with EU RoHS Directive 2011/65/EU and use lead-free matte tin terminations. The original Philips datasheet references pre-RoHS processes, but current production meets J-STD-020 moisture sensitivity level 1 and IPC/JEDEC standard J-STD-002.
How does thermal performance differ between per-transistor and per-device power ratings?
Per-transistor Ptot is 200 mW (SOT363); per-device is 300 mW. This reflects shared thermal path: simultaneous conduction in both transistors raises junction temperature faster than single-transistor operation, so total dissipation must be limited to 300 mW even if individual currents stay below 100 mA.
PUMD17,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Transistor Type:
- 1 NPN, 1 PNP - Pre-Biased (Dual)
- Current - Collector (Ic) (Max):
- 100mA
- Voltage - Collector Emitter Breakdown (Max):
- 50V
- Resistor - Base (R1):
- 47kOhms
- Resistor - Emitter Base (R2):
- 22kOhms
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 60 @ 5mA, 5V
- Vce Saturation (Max) @ Ib, Ic:
- 150mV @ 500µA, 10mA
- Current - Collector Cutoff (Max):
- 1µA
- Frequency - Transition:
- -
- Power - Max:
- 300mW
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSSOP
PUMD17,115 FAQ
1.How can I place an order for PUMD17,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PUMD17,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PUMD17,115 reliable?
The price and inventory of PUMD17,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PUMD17,115 is usually 5 days.
3.What payment methods are accepted for PUMD17,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PUMD17,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PUMD17,115?
PUMD17,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PUMD17,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PUMD17,115?
For technical support, including PUMD17,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PUMD17,115 requirements.
6.How does Aetrix verify that PUMD17,115 is sourced from the original manufacturer or authorized distributors?
All PUMD17,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PUMD17,115 meets industry standards.
7.What is the process for return or replacement of PUMD17,115?
All PUMD17,115 units undergo pre-shipment inspection (PSI). If there is an issue with PUMD17,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PUMD17,115 part is unused and in its original packaging.
Return procedure for PUMD17,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PUMD17,115 Tags
-
SMUN5311DW1T1G
onsemi
-
UMH9NTN
Rohm Semiconductor
-
PUMH13,115
Nexperia USA Inc.
-
PUMD3-QX
Nexperia USA Inc.
-
PUMD2,115
Nexperia USA Inc.
-
RN4987FE,LF(CT
Toshiba Semiconductor and Storage
-
PUMD12,115
Nexperia USA Inc.
-
PUMD9,115
Nexperia USA Inc.
-
PUMH9,115
Nexperia USA Inc.
-
PUMD3,115
Nexperia USA Inc.
-
DCX114EU-7-F
Diodes Incorporated
-
PUMD13,115
Nexperia USA Inc.
Tech Hub
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
LDO regulator guide covering low dropout voltage, power dissipation, thermal design, PSRR, output noise, capacitor stability, adjustable LDO circuits, LDO vs buck converter and datasheet selection chec…
Conditional Access Module guide covering CAM meaning, CI/CI+ interface, smart card authorization, DVB security workflow, TV and set-top box compatibility, internal electronics, ESD protection, connecto…
Guide to electronic component obsolescence covering EOL risk, PCN/PDN notices, last-time buy planning, replacement options, form-fit-function validation, counterfeit risk and BOM lifecycle management.
18650 battery guide covering lithium-ion cell basics, 3.6V/3.7V voltage, 4.2V charging, mAh and Wh capacity, protected cells, chargers, BMS, series-parallel packs, holders, welding and sourcing checks.…
Hall effect sensor guide covering working principle, linear and digital sensors, Arduino circuits, current sensing, speed detection, automotive applications, A3144 examples, signal filtering and datash…
Product Change Notification guide for electronic components, covering PCN meaning, PCN vs PDN/EOL, common change types, risk levels, form-fit-function review, engineering validation, BOM control, LTB/L…
A practical guide to blend door actuators, covering HVAC function, symptoms, location, AC and heater issues, reset and calibration, replacement cost, electrical diagnosis, compatibility checks, and rep…
Engineering guide to Raspberry Pi alternatives, covering chip-level differences, Orange Pi, ROCK, Jetson, Banana Pi, NanoPi, Compute Module, Pico, GPIO, camera, HAT compatibility, and replacement risks…
