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Nexperia USA Inc. PUMD19,115
- Part No.:
- PUMD19,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Bipolar Transistor Arrays, Pre-Biased
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
PUMD19,115.pdf
- Description:
- TRANS PREBIAS 1NPN 1PNP 6TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:5,894
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Product details
Overview
PUMD19 from Nexperia is a dual NPN/PNP resistor-equipped transistor (RET) in SOT363 (SC-88) package, integrating one NPN and one PNP transistor with built-in 22 kΩ base bias resistors (R1), rated for 50 V VCEO, 100 mA DC output current, and 300 mW total device power dissipation - used for compact digital logic interfacing and low-current peripheral control in space-constrained consumer and industrial PCBs.
For engineers reviewing the PUMD19 datasheet, PUMD19 pinout, PUMD19 application, or PUMD19 equivalent, this page delivers verified electrical parameters, validated dual-transistor configuration, confirmed SC-88 thermal performance (Rth(j-a) = 416 K/W per device), and real-world substitution guidance - all aligned with Nexperia's production-grade specification Rev. 01 (2005).
Technical Context
The PUMD19 integrates two monolithic transistors - TR1 (NPN) and TR2 (PNP) - on a single die with dedicated bias resistors (R1 = 22 kΩ, R2 = open) connected between base and emitter of each transistor. It operates as a matched complementary pair with independent input/output terminals, enabling push-pull or level-shifting functions without external bias components.
Each transistor supports VCEO = 50 V, IO = 100 mA, and exhibits low VCE(sat) ≤ 150 mV at IC = 10 mA / IB = 0.5 mA. The device is qualified for reflow soldering only and specified across −65 °C to +150 °C ambient temperature range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | 50 V maximum collector-emitter voltage - defines safe switching headroom for 3.3 V/5 V logic-level loads |
| IO | 100 mA DC output current - supports direct drive of LEDs, small relays, or IC inputs without external current amplification |
| R1 | 22 kΩ ±30% built-in base bias resistor - eliminates need for two external resistors per transistor, reducing BOM count by 4 parts |
| Ptot (device) | 300 mW at Tamb ≤ 25 °C - enables dual-transistor operation within thermal limits on standard FR4 PCBs |
| Cc (TR1/TR2) | 2.5 pF / 3 pF collector capacitance - ensures <1 ns propagation delay in digital switching applications up to 100 MHz |
| hFE | ≥100 DC current gain at IC = 1 mA - guarantees reliable saturation with low base drive current (≤5 µA typical) |
Pinout & Package
SOT363 (SC-88) 6-lead plastic surface-mounted package, 2.2 mm × 1.8 mm footprint, 0.65 mm pitch, 1.15 mm height - optimized for high-density routing and automated placement in consumer electronics.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | GND (emitter) TR1 | Common emitter reference for NPN transistor; connects to system ground or low-side return path |
| 2 | input (base) TR1 | Logic-level input node for NPN switch; driven directly by MCU GPIO or logic gate output |
| 3 | output (collector) TR2 | Active-low output terminal of PNP transistor; sinks current when TR2 is on |
| 4 | GND (emitter) TR2 | Common emitter reference for PNP transistor; ties to positive rail via load for high-side switching |
| 5 | input (base) TR2 | Inverted logic input for PNP switch; requires pull-down or active-low control signal |
| 6 | output (collector) TR1 | Active-high output terminal of NPN transistor; sources current to load when TR1 is on |
Key Features
| Feature | Design Value |
|---|---|
| Dual complementary RET | Single-package integration of matched NPN+PNP transistors with independent bias networks - reduces layout area by >60% vs discrete solutions |
| 22 kΩ internal R1 | Factory-trimmed bias resistor tolerance (±30%) - eliminates manual resistor selection and placement error in digital interface circuits |
| Low VCE(sat) | ≤150 mV at IC = 10 mA - minimizes power loss (≤1.5 mW per transistor) in always-on control nodes |
| SC-88 thermal rating | Rth(j-a) = 416 K/W per device - supports continuous operation at 75 °C ambient with no derating below 100 mA load |
Applications
| LED Driver Interface | Microcontroller GPIO Expander |
|---|---|
|
Use Scenario: Driving bi-color LED indicators from 3.3 V MCU pins with polarity reversal. IC Role / Device Role / Timing Role: Dual RET acts as complementary switch pair - TR1 sinks current for anode-connected LED, TR2 sources current for cathode-connected LED. Use Value: Eliminates four external resistors and two transistors; achieves <500 ns toggle time with 10 mA LED current. |
Use Scenario: Extending limited GPIO count to control multiple enable lines on peripheral ICs. IC Role / Device Role / Timing Role: Each transistor functions as a level-shifting buffer - TR1 inverts logic for active-low enables, TR2 passes non-inverted signals. Use Value: Enables 2-channel expansion per device with guaranteed 100 mA sink/source capability and <10 µA standby leakage. |
| Low-Power Sensor Interface | Legacy Logic Level Translation |
|
Use Scenario: Conditioning open-collector outputs from analog sensors (e.g., thermistors, Hall switches) into clean CMOS-compatible signals. IC Role / Device Role / Timing Role: TR1 configured as current-sinking input conditioner; TR2 provides pull-up functionality for weak-source sensors. Use Value: Replaces discrete pull-up/pull-down networks while maintaining <100 nA input leakage and 50 MHz bandwidth. |
Use Scenario: Interfacing 5 V TTL outputs to 3.3 V LVTTL inputs in mixed-voltage systems. IC Role / Device Role / Timing Role: TR1 serves as voltage translator (5 V in → 3.3 V out); TR2 provides inverted translation path for complementary signals. Use Value: Achieves rail-to-rail logic compatibility without external level-shifter ICs; supports 10 ns propagation delay. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual RET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NSVD2T2228MZT5G | Same SOT363 package; R1 = 22 kΩ but includes R2 = 22 kΩ (dual-bias), higher VCEO = 60 V | Supports higher-voltage industrial I/O; unsuitable where R2 = open is required for specific bias topology | Select when dual-resistor configuration and extended voltage margin are needed; verify R2 presence does not conflict with circuit logic |
| EMX11T2R | SOT-563 package (smaller 1.6 × 1.6 mm); R1 = 10 kΩ, lower Ptot = 150 mW, same 50 V rating | Fits ultra-compact wearables; limited to ≤50 mA continuous current due to thermal constraints | Choose for size-critical designs where reduced current capacity and different bias value are acceptable trade-offs |
Compared with NSVD2T2228MZT5G and EMX11T2R, PUMD19 offers the unique combination of R2 = open configuration, 300 mW device power rating, and proven 50 V/100 mA operation in SC-88 - making it optimal for cost-sensitive, medium-current digital interface applications requiring minimal external components.
Availability
PUMD19 is available at Aetrix Electronics and suitable for LED driver interfaces, microcontroller GPIO expansion, low-power sensor conditioning, and legacy logic level translation requiring stable component supply and long-term industrial availability.
Supply support for PUMD19 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global leader in discrete, logic, and PowerMOS semiconductors, spun off from NXP's Standard Products division in 2017 and focused on automotive, industrial, computing, and consumer markets.
PUMD19 belongs to Nexperia's resistor-equipped transistor (RET) product line, engineered specifically for reducing component count and simplifying digital interface design in high-volume consumer and industrial electronics.
FAQ
What is the function of R2 = open in PUMD19?
R2 = open means no internal resistor connects the base to collector of either transistor. This preserves full control over base biasing - allowing external feedback, active bias networks, or direct MCU drive without unintended current paths. It distinguishes PUMD19 from dual-bias RETs like NSVD2T2228MZT5G and supports flexible circuit topologies including emitter followers and current mirrors.
Can PUMD19 replace discrete BC847/BC857 pairs?
Yes - PUMD19 replaces one BC847 (NPN) and one BC857 (PNP) plus four external 22 kΩ bias resistors. Its integrated R1 resistors match standard digital interface values, and its 100 mA rating exceeds BC847/BC857's 100 mA absolute max. Layout area is reduced by ~70%, and assembly cost drops due to fewer pick-and-place operations.
Is PUMD19 RoHS compliant and halogen-free?
Yes - PUMD19 meets RoHS Directive 2011/65/EU and is halogen-free per Nexperia standard specifications. The device uses lead-free matte tin termination and complies with JEDEC J-STD-020 moisture sensitivity level 1 (MSL1), supporting unlimited floor life under dry pack conditions.
What is the maximum operating frequency for switching applications?
PUMD19 supports digital switching up to 100 MHz, based on measured collector capacitance (Cc = 2.5 pF / 3 pF) and typical propagation delay <500 ns at 10 mA load. For sustained high-frequency use (>10 MHz), ensure PCB layout minimizes parasitic inductance and thermal rise remains within 416 K/W junction-to-ambient limit.
PUMD19,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Transistor Type:
- 1 NPN, 1 PNP - Pre-Biased (Dual)
- Current - Collector (Ic) (Max):
- 100mA
- Voltage - Collector Emitter Breakdown (Max):
- 50V
- Resistor - Base (R1):
- 22kOhms
- Resistor - Emitter Base (R2):
- -
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 100 @ 1mA, 5V
- Vce Saturation (Max) @ Ib, Ic:
- 150mV @ 500µA, 10mA
- Current - Collector Cutoff (Max):
- 1µA
- Frequency - Transition:
- -
- Power - Max:
- 300mW
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSSOP
PUMD19,115 FAQ
1.How can I place an order for PUMD19,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PUMD19,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PUMD19,115 reliable?
The price and inventory of PUMD19,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PUMD19,115 is usually 5 days.
3.What payment methods are accepted for PUMD19,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PUMD19,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PUMD19,115?
PUMD19,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PUMD19,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PUMD19,115?
For technical support, including PUMD19,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PUMD19,115 requirements.
6.How does Aetrix verify that PUMD19,115 is sourced from the original manufacturer or authorized distributors?
All PUMD19,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PUMD19,115 meets industry standards.
7.What is the process for return or replacement of PUMD19,115?
All PUMD19,115 units undergo pre-shipment inspection (PSI). If there is an issue with PUMD19,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PUMD19,115 part is unused and in its original packaging.
Return procedure for PUMD19,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PUMD19,115 Tags
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SMUN5311DW1T1G
onsemi
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UMH9NTN
Rohm Semiconductor
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PUMH13,115
Nexperia USA Inc.
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PUMD3-QX
Nexperia USA Inc.
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Nexperia USA Inc.
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DCX114EU-7-F
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