Nexperia USA Inc. PUMD20,115
- Part No.:
- PUMD20,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Bipolar Transistor Arrays, Pre-Biased
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
PUMD20,115.pdf
- Description:
- TRANS PREBIAS 1NPN 1PNP 6TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:2,444
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Product details
Overview
PUMD20 from Nexperia is an AEC-Q101-qualified NPN/PNP resistor-equipped double transistor (RET) in SOT363-3 (SC-88) package, rated for 50 V VCEO, 100 mA output current per transistor, with integrated 2.2 kΩ input bias resistors (R1 = R2), used for compact digital logic interfacing and low-current peripheral control in automotive and industrial PCBs.
For engineers reviewing the PUMD20 datasheet, PUMD20 pinout, PUMD20 application, or PUMD20 equivalent, this device serves as a space-optimized, bias-resistor-integrated replacement for discrete NPN+PNP pairs in level-shifting, I/O buffering, and IC input driving where reduced BOM count and AEC-Q101 compliance are required.
Technical Context
The PUMD20 integrates two complementary silicon transistors - TR1 (NPN) and TR2 (PNP) - each with monolithically embedded base bias resistors (R1 = 2.2 kΩ, R2 = 2.2 kΩ) and matched R2/R1 ratio (0.8–1.2). It operates with VCEO = 50 V and IO = 100 mA per channel under Tamb ≤ 25 °C, supporting bidirectional signal conditioning without external bias networks.
Its thermal resistance is 416 K/W (per device, FR4 PCB), junction temperature rated to 150 °C, and features VI(on) = 1.6 V (typ) and VI(off) = 1.2 V (typ) at 25 °C - enabling reliable TTL/CMOS-compatible switching across −40 °C to +150 °C ambient range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | 50 V - Maximum collector-emitter voltage before breakdown; defines safe operating voltage headroom for 24 V automotive and 3.3/5 V logic systems. |
| IO | 100 mA - Continuous output current per transistor; supports direct drive of LEDs, small relays, and logic inputs without external current amplification. |
| R1 / R2 | 2.2 kΩ ±30% - Integrated base bias resistors eliminate need for external pull-up/down components, reducing layout area and assembly steps. |
| hFE | 30 (min) at IC = 20 mA - DC current gain sufficient for saturated switching in digital interface applications with predictable turn-on behavior. |
| VCE(sat) | 150 mV (max) at IC = 10 mA, IB = 0.5 mA - Low saturation voltage minimizes power loss and heat generation in high-duty-cycle switching. |
| Tj max | 150 °C - Junction temperature rating enables operation in under-hood automotive environments and thermally constrained industrial enclosures. |
Pinout & Package
SOT363-3 (TSSOP6) plastic surface-mounted package: 2.2 mm × 1.35 mm footprint, 0.65 mm pitch, 0.95 mm max height, designed for reflow soldering on FR4 PCBs with standard 0.5 mm pad width.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | GND1 | Emiter connection for TR1 (NPN); common reference node for first transistor's current path. |
| 2 | I1 | Base input for TR1 (NPN); accepts logic-level signals directly due to integrated R1 bias network. |
| 3 | O2 | Collector output for TR2 (PNP); active-low switching node for sourcing current when TR2 is on. |
| 4 | GND2 | Emiter connection for TR2 (PNP); independent ground return for second transistor, enabling dual-rail operation. |
| 5 | I2 | Base input for TR2 (PNP); compatible with negative-going or low-voltage logic edges via internal R1/R2 divider. |
| 6 | O1 | Collector output for TR1 (NPN); active-high switching node for sinking current in standard logic configurations. |
Key Features
| Feature | Design Value |
|---|---|
| Built-in bias resistors (R1 = R2 = 2.2 kΩ) | Eliminates 4 external resistors per RET pair, cutting PCB area by ≥30% and reducing pick-and-place cycle time. |
| AEC-Q101 qualification | Validated for automotive-grade reliability including HTOL, TC, ESD-HBM ≥8 kV, and mechanical shock - suitable for body control modules and sensor interfaces. |
| NPN/PNP complementarity | Enables push-pull or complementary logic gating in single-package form, avoiding timing skew and layout mismatch between discrete pairs. |
| Low VCE(sat) (150 mV max) | Reduces conduction loss to <1.5 mW at 10 mA, critical for battery-powered and thermally sensitive applications. |
Applications
| Automotive Door Module Interface | Industrial PLC Input Buffer |
|---|---|
Use Scenario: Driving window lift motor enable lines and mirror fold/unfold signals in door control units. IC Role / Device Role / Timing Role: Level-shifting and current-sinking interface between 3.3 V microcontroller GPIO and 12 V load circuits. Use Value: Eliminates discrete resistor-transistor pairs while maintaining AEC-Q101 compliance and thermal margin up to 105 °C ambient. |
Use Scenario: Conditioning 24 V dry-contact inputs into 5 V logic levels for programmable logic controller (PLC) digital input cards. IC Role / Device Role / Timing Role: Dual-channel input buffer with integrated pull-down (TR1) and pull-up (TR2) functionality for noise-immune signal acquisition. Use Value: Reduces component count by 8 parts per channel and improves ESD robustness (IEC 61000-4-2 Level 4) via monolithic construction. |
| USB-C Port Power Switch Control | IoT Sensor Node Wake-Up Circuit |
Use Scenario: Enabling/disabling VBUS and CC line termination in USB-C receptacle designs with dual-role port capability. IC Role / Device Role / Timing Role: Complementary switch driver controlling high-side and low-side MOSFET gates during port role negotiation. Use Value: Matches fast turn-on/off timing (ton/toff < 100 ns typical) and avoids cross-conduction risk through inherent NPN/PNP pairing. |
Use Scenario: Waking ultra-low-power MCUs from deep sleep using mechanical switch or magnetic reed inputs in battery-operated environmental sensors. IC Role / Device Role / Timing Role: Debounced, low-leakage (ICEO < 5 µA at 150 °C) input conditioner that maintains sub-µA standby current. Use Value: Achieves <0.5 µA total quiescent current in off-state while providing VI(off) > 1.2 V margin against noise-induced false triggers. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar resistor-equipped transistor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PUMH20 | NPN/NPN configuration; identical R1/R2 values and package; no PNP channel. | Suitable only for dual-sink or level-shift-only topologies; cannot replace PUMD20 in push-pull or complementary logic. | Select when both outputs require sinking capability and polarity matching is essential. |
| PUMB20 | PNP/PNP configuration; same R1/R2 and package; no NPN channel. | Limited to dual-source applications; lacks active-low switching capability of TR1 in PUMD20. | Choose for high-side switching arrays where sourcing dominates and no NPN sink is needed. |
Compared with PUMH20 and PUMB20, the PUMD20 uniquely provides mixed-polarity switching in one package - enabling true complementary output stages without inter-channel timing mismatch or layout asymmetry, critical for clean signal transitions in bidirectional interfaces.
Availability
PUMD20 is available at Aetrix Electronics and suitable for automotive body electronics, industrial PLC input modules, and USB-C power delivery subsystems requiring stable component supply, AEC-Q101 assurance, and SMT-compatible miniaturization.
Supply support for PUMD20 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic devices, with leadership in automotive-qualified components and advanced packaging technologies.
The PUMD20 belongs to Nexperia's Resistor-Equipped Transistor (RET) family, engineered specifically to replace legacy discrete transistor-resistor combinations in space-constrained, high-reliability digital interface applications.
FAQ
What is the maximum continuous power dissipation for PUMD20?
The PUMD20 has a per-device total power dissipation limit of 300 mW at Tamb ≤ 25 °C on FR4 PCB with single-sided copper. Derating begins linearly above 25 °C at 0.72 mW/°C, reaching zero dissipation at 150 °C ambient - consistent with its 150 °C junction rating and 416 K/W thermal resistance.
Can PUMD20 be used in 5 V logic systems with 3.3 V microcontrollers?
Yes. With VI(on) = 1.6 V (typ) and VI(off) = 1.2 V (typ), the PUMD20 reliably switches with 3.3 V CMOS outputs. Its 2.2 kΩ input resistors provide appropriate base current for full saturation at IC ≤ 100 mA, and VCE(sat) remains ≤150 mV - ensuring clean logic-level translation without external level shifters.
Is the R2/R1 ratio fixed or adjustable?
The R2/R1 ratio is fixed at 1.0 ±20% (0.8–1.2) per device, as confirmed in Table 1 and Table 7. This ratio is process-controlled during fabrication and not user-adjustable; it ensures matched biasing for both transistors and stable switching thresholds across temperature and voltage.
How does PUMD20 differ from standard dual transistors like BC847BDW?
Unlike BC847BDW - which requires four external bias resistors - the PUMD20 integrates R1 and R2 internally, reducing component count, PCB area, and assembly cost. It also carries AEC-Q101 qualification, whereas BC847BDW is commercial-grade only, and offers tighter VI(on)/VI(off) specs optimized for digital interface rather than analog amplification.
PUMD20,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Transistor Type:
- 1 NPN, 1 PNP - Pre-Biased (Dual)
- Current - Collector (Ic) (Max):
- 100mA
- Voltage - Collector Emitter Breakdown (Max):
- 50V
- Resistor - Base (R1):
- 2.2kOhms
- Resistor - Emitter Base (R2):
- 2.2kOhms
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 30 @ 20mA, 5V
- Vce Saturation (Max) @ Ib, Ic:
- 150mV @ 500µA, 10mA
- Current - Collector Cutoff (Max):
- 1µA
- Frequency - Transition:
- -
- Power - Max:
- 300mW
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSSOP
PUMD20,115 FAQ
1.How can I place an order for PUMD20,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PUMD20,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PUMD20,115 reliable?
The price and inventory of PUMD20,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PUMD20,115 is usually 5 days.
3.What payment methods are accepted for PUMD20,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PUMD20,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PUMD20,115?
PUMD20,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PUMD20,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PUMD20,115?
For technical support, including PUMD20,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PUMD20,115 requirements.
6.How does Aetrix verify that PUMD20,115 is sourced from the original manufacturer or authorized distributors?
All PUMD20,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PUMD20,115 meets industry standards.
7.What is the process for return or replacement of PUMD20,115?
All PUMD20,115 units undergo pre-shipment inspection (PSI). If there is an issue with PUMD20,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PUMD20,115 part is unused and in its original packaging.
Return procedure for PUMD20,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PUMD20,115 Tags

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