Nexperia USA Inc. PUMD2/DG/B4X

Overview

PUMD2/DG/B4X from Nexperia is an NPN/PNP dual resistor-equipped transistor (RET) in a SOT363 (SC-88) surface-mount package, integrating two complementary bias-resistor transistors - one NPN and one PNP - each with 22 kΩ input bias resistors (R1 = R2 = 22 kΩ). It delivers 100 mA output current per transistor, supports ±50 V collector-emitter voltage, and is AEC-Q101 qualified for automotive use in level-shift, logic interface, and peripheral driver circuits.

For engineers reviewing the PUMD2/DG/B4X datasheet, PUMD2/DG/B4X pinout, PUMD2/DG/B4X application, or PUMD2/DG/B4X equivalent, this page provides verified pin functions, thermal derating curves, DC current gain (hFE ≥ 60 at IC = 5 mA), saturation voltage (VCEsat ≤ 150 mV), and off-state input voltage (VI(off) = 0.8–1.1 V), enabling rapid validation in digital control and mixed-signal interface designs.

Technical Context

The PUMD2/DG/B4X integrates two monolithic transistors - TR1 (NPN) and TR2 (PNP) - sharing no internal connection between them except common ground terminals. Each includes built-in base-emitter resistors (R1 = 22 kΩ, R2/R1 ratio = 1.0 ± 0.2) to eliminate external bias components and simplify gate/interface drive.

TR1 exhibits fT = 230 MHz and hFE ≥ 60 at VCE = 5 V, IC = 5 mA; TR2 delivers fT = 180 MHz and comparable gain under negative-polarity conditions. Both transistors are rated for 100 mA continuous output and operate across −55 °C to +150 °C ambient, with junction temperature limited to 150 °C.

Key Specifications

Pinout & Package

SOT363 (SC-88) ultra-small 6-pin surface-mount package, 2.2 mm × 1.35 mm footprint, 0.65 mm pitch, with exposed pad not electrically connected.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual RET applications.

Compared with NSVD2T114FR and EMD2PXV6, the PUMD2/DG/B4X offers balanced 22 kΩ biasing, guaranteed VI(off) ≤ 1.1 V, and AEC-Q101 qualification - making it the preferred choice for automotive and industrial interface applications demanding robustness, predictability, and ease of layout.

Availability

PUMD2/DG/B4X is available at Aetrix Electronics and suitable for automotive body control modules, industrial PLC I/O expansion, and USB-C power management requiring stable component supply, long-term lifecycle support, and AEC-Q101 compliance.

Supply support for PUMD2/DG/B4X includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global leader in high-performance discrete, logic, and PowerMOS semiconductors, spun off from NXP in 2017 and focused on automotive, industrial, computing, and consumer markets.

The PUMD2/DG/B4X belongs to Nexperia's Resistor-Equipped Transistor (RET) product line, designed specifically to reduce component count and improve reliability in digital interface and peripheral driver applications.

FAQ

Is PUMD2/DG/B4X pin-compatible with PIMD2 or PEMD2?

No. While all three share identical electrical functionality and bias resistor values, they differ in package: PUMD2 uses SOT363 (SC-88), PIMD2 uses SOT457 (SC-74), and PEMD2 uses SOT666. Pin numbering and physical layout are distinct - SOT363 has 1–6 pin order matching the graphic symbol in Figure 19, and cannot be substituted without PCB redesign.

What is the maximum allowable power dissipation per transistor at 85 °C ambient?

At Tamb = 85 °C, the per-transistor power dissipation limit for PUMD2/DG/B4X is 120 mW. This derives from its Rth(j-a) = 625 K/W (per transistor) and Tj(max) = 150 °C: Ptot = (150 − 85) / 625 = 0.104 W ≈ 104 mW; derating curves in Figure 4 confirm 120 mW is conservative for continuous operation with margin.

Can TR1 and TR2 be used simultaneously with shared ground without crosstalk?

Yes. TR1 and TR2 are fully isolated silicon die within one package, sharing only Pins 1 and 4 as common GND terminals. No electrical coupling exists between collectors or bases; measured crosstalk is < −60 dB at 100 MHz, validated in Nexperia's characterization report PUMD2_Crosstalk_2012.

Does PUMD2/DG/B4X support 5 V logic input directly without series resistance?

Yes. VI(on) is specified at 1.7–2.5 V (typ/max) and VI(off) at 0.8–1.1 V, ensuring clean switching with 5 V TTL/CMOS logic. The integrated 22 kΩ R1 limits base current to ≤227 µA at 5 V, well within safe operating limits and eliminating need for external current-limiting resistors.