Nexperia USA Inc. PUMD4,115

Overview

PUMD4 from Nexperia is an NPN/PNP resistor-equipped double transistor (RET) in SOT363 (SC-88) package, integrating built-in 10 kΩ bias resistors on each input, rated for 50 V V_CEO, 100 mA output current per transistor, and 300 mW total device power dissipation - used to drive low-current digital peripherals and control IC inputs in space-constrained logic interfaces.

For engineers reviewing the PUMD4 datasheet, PUMD4 pinout, PUMD4 application, or PUMD4 equivalent, this discrete dual RET simplifies level-shifting, bus buffering, and I/O conditioning circuits where reduced component count and consistent base biasing are critical design requirements.

Technical Context

The PUMD4 integrates two complementary transistors - TR1 (NPN) and TR2 (PNP) - each with a dedicated 10 kΩ input bias resistor (R1) and open R2 configuration, enabling direct TTL/CMOS-compatible switching without external base resistors. It operates with V_CEO = 50 V and I_O = 100 mA per channel under T_amb ≤ 25 °C.

Thermal performance is defined for FR4 PCB mounting: R_th(j-a) = 416 K/W (per device), supporting stable operation up to T_j = 150 °C. DC current gain h_FE ≥ 200 at I_C = 1 mA, V_CE = 5 V ensures reliable saturation in digital switching roles.

Key Specifications

Pinout & Package

SOT363 (TSSOP6) plastic surface-mount package: 6-pin, 0.65 mm pitch, 2.1 mm × 1.25 mm × 0.95 mm body size, designed for reflow soldering on FR4 PCBs with standard footprint per Figure 6.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar resistor-equipped transistor applications.

Compared with PUMH4 and PUMB4, the PUMD4 uniquely provides complementary NPN/PNP outputs in one package - enabling true push-pull drive, bus arbitration, and mixed-signal interfacing without added logic gates or layout complexity.

Availability

PUMD4 is available at Aetrix Electronics and suitable for LED driver interfaces, microcontroller GPIO expansion, and digital bus buffering requiring stable component supply, consistent parametric performance, and long-term industrial availability.

Supply support for PUMD4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert delivering high-performance, reliable discrete, logic, and MOSFET devices optimized for efficiency, miniaturization, and manufacturability in high-volume electronics.

The PUMD4 belongs to Nexperia's Resistor-Equipped Transistor (RET) product line, engineered specifically to reduce bill-of-materials count and improve assembly yield in consumer, computing, and industrial digital interface applications.

FAQ

What is the function of R2 in the PUMD4?

R2 is internally open (not connected) in the PUMD4 - only R1 (10 kΩ) is implemented per transistor channel. This configuration supports standard single-resistor biasing for digital switching, unlike variants such as PUMD3 which include both R1 and R2. No external connection or termination is required for R2.

Can PUMD4 replace discrete transistors in existing designs?

Yes - the PUMD4 directly replaces two discrete transistors plus four external base resistors in NPN+PNP configurations. Its SOT363 footprint matches common SC-88 layouts, and its 10 kΩ R1 value aligns with typical 3.3 V/5 V logic drive requirements, enabling drop-in substitution with verified V_CE(sat) and h_FE margins.

Is PUMD4 qualified for automotive applications?

No - the PUMD4 is explicitly marked as non-automotive qualified in its revision history (v.3, October 2022). It lacks AEC-Q101 qualification, automotive-grade testing, and extended temperature validation. For automotive use, Nexperia offers -Q qualified variants such as PUMD4-Q, which must be specified separately.

How does thermal derating affect PUMD4's usable current?

At ambient temperatures above 25 °C, PUMD4's total power dissipation derates linearly from 300 mW, reaching zero at 105 °C (based on 416 K/W R_th(j-a)). At 70 °C ambient, maximum usable power drops to ~180 mW, limiting continuous I_O to ~85 mA per transistor assuming V_CE(sat) ≈ 150 mV - verified via Figure 1 derating curve.