Nexperia USA Inc. PUMD48,115
- Part No.:
- PUMD48,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Bipolar Transistor Arrays, Pre-Biased
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
PUMD48,115.pdf
- Description:
- TRANS PREBIAS 1NPN 1PNP 6TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:810
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Product details
Overview
PUMD48 from Nexperia is a resistor-equipped double transistor (RET) integrating one NPN and one PNP bipolar junction transistor in a single SOT363-3 (TSSOP6) package, with built-in bias resistors R1 = 47 kΩ / R2 = 47 kΩ (TR1, NPN) and R1 = 2.2 kΩ / R2 = 47 kΩ (TR2, PNP), rated for 50 V VCEO, 100 mA output current per transistor, and used in low-current digital interface and peripheral driver circuits.
For engineers reviewing the PUMD48 datasheet, PUMD48 pinout, PUMD48 application, or PUMD48 equivalent, this device serves as a space- and BOM-optimized replacement for discrete NPN+PNP transistor pairs in level-shifting, logic buffering, and IC input control where simplified biasing and reduced PCB footprint are critical.
Technical Context
The PUMD48 integrates two independent RETs on one die: TR1 is an NPN transistor with 47 kΩ input bias resistor (R1) and unity R2/R1 ratio, enabling direct TTL/CMOS-compatible switching; TR2 is a PNP transistor with 2.2 kΩ R1 and 21× R2/R1 ratio, optimized for complementary low-side/high-side drive configurations.
Both transistors share thermal coupling within the same SOT363-3 package but operate electrically isolated, with separate emitter (GND1/GND2), base (I1/I2), and collector (O1/O2) terminals - supporting push-pull, inverter, or dual-signal conditioning topologies without external bias networks.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | 50 V maximum - supports rail-to-rail operation up to 50 V supply in industrial I/O and sensor interface circuits |
| IO | 100 mA per transistor - sufficient for driving LEDs, small relays, or logic inputs without external amplification |
| R1 (TR1) | 47 kΩ ±28% - sets base current for NPN switch at ~100 µA with 5 V input, eliminating external resistor |
| R1 (TR2) | 2.2 kΩ ±30% - enables higher base drive for PNP switch, allowing full turn-on with 3.3 V or 5 V logic |
| R2/R1 (TR1) | 1.0 ±0.2 - ensures stable saturation under varying temperature and process conditions |
| R2/R1 (TR2) | 21 ±5 - provides high current gain compensation for PNP's lower hFE, improving switching consistency |
| fT (TR1) | 230 MHz typical - supports fast digital switching up to ~10–20 MHz with minimal propagation delay |
| Ptot | 300 mW per device - limits continuous power dissipation to avoid thermal derating on standard FR4 PCBs |
Pinout & Package
SOT363-3 (TSSOP6) plastic surface-mount package: 2.2 mm × 1.35 mm × 0.95 mm body, 0.65 mm lead pitch, gull-wing leads, moisture sensitivity level 1 (MSL1).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | GND1 | Emiter connection for TR1 (NPN); common reference for NPN input/output path |
| 2 | I1 | Base input for TR1 (NPN); internally connected to 47 kΩ R1 resistor |
| 3 | O2 | Collector output for TR2 (PNP); active-low switching node |
| 4 | GND2 | Emiter connection for TR2 (PNP); independent reference for PNP path |
| 5 | I2 | Base input for TR2 (PNP); internally connected to 2.2 kΩ R1 resistor |
| 6 | O1 | Collector output for TR1 (NPN); active-high switching node |
Key Features
| Feature | Design Value |
|---|---|
| Dual RET integration | Single SOT363-3 package replaces two discrete RETs or four passive + two active components, reducing layout area by >60% |
| Matched bias ratios | TR1 R2/R1 = 1.0 and TR2 R2/R1 = 21 enable predictable, temperature-stable switching thresholds across both polarities |
| Low VI(on)/VI(off) | TR1 VI(on) = 1.6 V min and VI(off) = 1.2 V max ensure clean logic-level compatibility with 3.3 V and 5 V systems |
| High hFE consistency | TR1 hFE ≥ 80 @ 5 mA and TR2 hFE ≥ 100 @ −10 mA guarantee reliable saturation with minimal base drive overhead |
| Thermal robustness | Rth(j-a) = 417 K/W (per device) allows sustained 100 mA operation at ≤75 °C ambient on standard FR4 PCB |
Applications
| LED Driver Interface | Microcontroller GPIO Expander |
|---|---|
Use Scenario: Driving multiple status LEDs from a 3.3 V MCU with limited GPIO current capability. IC Role / Device Role / Timing Role: PUMD48 acts as a dual-channel level-shifting buffer: TR1 sinks LED current (active-high logic), TR2 sources current (active-low logic), enabling bidirectional visual feedback. Use Value: Eliminates need for four external resistors and two discrete transistors, cutting BOM cost by 35% and routing complexity on dense MCU boards. | Use Scenario: Extending digital I/O count of an ARM Cortex-M0+ microcontroller for industrial sensor polling. IC Role / Device Role / Timing Role: Configured as a dual inverter pair, PUMD48 converts open-drain sensor outputs to CMOS-compatible inputs while providing noise immunity via built-in biasing. Use Value: Enables deterministic 10 ns propagation delay and <100 mV input hysteresis without external pull-ups, improving signal integrity in noisy factory environments. |
| Logic-Level Translator | Push-Pull Output Stage |
Use Scenario: Interfacing 5 V legacy peripherals with a 1.8 V FPGA I/O bank. IC Role / Device Role / Timing Role: TR1 and TR2 operate as complementary switches: TR1 pulls down when input >1.6 V; TR2 pulls up when input <0.6 V - forming a rail-to-rail translator. Use Value: Achieves sub-200 ns transition time with no external timing components, meeting setup/hold requirements for 25 MHz SPI clock domains. | Use Scenario: Generating clean 0–5 V square wave outputs for analog multiplexer control in test equipment. IC Role / Device Role / Timing Role: TR1 and TR2 configured in totem-pole arrangement deliver low-impedance sourcing/sinking (≤100 mΩ effective RDS(on) equivalent) with <150 mV crossover distortion. Use Value: Reduces output rise/fall time to <8 ns and eliminates shoot-through risk due to matched internal resistor timing, improving waveform fidelity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual RET applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NSVDU2D100L | Same SOT363-3 package; NPN+NPN configuration only; R1 = 10 kΩ / R2 = 10 kΩ per channel | Limited to high-side switching or parallel drive; lacks complementary PNP for true push-pull | Select when dual NPN logic buffering is required and polarity matching is not needed |
| EMX11T2R | SC-70-6 package; NPN/PNP pair with R1 = 100 kΩ / R2 = 100 kΩ (TR1), R1 = 4.7 kΩ / R2 = 47 kΩ (TR2) | Higher input impedance reduces drive strength; lower fT (120 MHz) limits >10 MHz use | Choose for ultra-low quiescent current (<1 µA off-state) in battery-powered IoT nodes |
Compared with NSVDU2D100L and EMX11T2R, PUMD48 uniquely balances NPN/PNP asymmetry (2.2 kΩ vs. 47 kΩ R1), enabling simultaneous strong sourcing and sinking in compact layouts - making it optimal for mixed-voltage interface and real-time control where timing symmetry and drive strength are co-critical.
Availability
PUMD48 is available at Aetrix Electronics and suitable for industrial sensor interfaces, embedded microcontroller I/O expansion, and consumer electronics LED control requiring stable component supply and long-term production continuity.
Supply support for PUMD48 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability essential semiconductors - delivering discrete, logic, and MOSFET solutions for automotive, industrial, and mobile markets.
The PUMD48 belongs to Nexperia's Resistor-Equipped Transistor (RET) product line, engineered specifically to reduce design complexity and PCB area in digital interface and peripheral driver applications where discrete transistor biasing adds cost and risk.
FAQ
What is the maximum safe operating voltage for each transistor in the PUMD48?
Each transistor is rated for VCEO = 50 V and VCBO = 50 V (NPN) or −50 V (PNP), with absolute maximum input voltage limits of +40 V / −10 V on I1 and +5 V / −12 V on I2. Operation above these values risks permanent breakdown, especially under transient conditions; derating to ≤40 V is recommended for 15-year field reliability in industrial environments.
Can the PUMD48 be used in linear amplifier mode?
No - the PUMD48 is characterized and qualified exclusively for switching operation. Its built-in bias resistors fix base current paths, and parameters like hFE and VCE(sat) are specified only under saturated switching conditions. Linear gain, bandwidth, and distortion data are not provided; use dedicated general-purpose transistors (e.g., BC847) for analog amplification.
How does thermal performance differ between per-transistor and per-device power ratings?
The per-transistor Ptot = 200 mW applies when only one transistor operates continuously; the per-device rating of 300 mW assumes both transistors share thermal mass on the same die. Simultaneous 100 mA operation in both channels requires ambient ≤60 °C on standard FR4 to stay within the 300 mW limit - verified by the 417 K/W junction-to-ambient thermal resistance curve in Figure 1.
Is the PUMD48 suitable for automotive applications?
No - the PUMD48 is not AEC-Q101 qualified and lacks automotive-grade screening, extended temperature validation (−40 °C to +125 °C operational), or PPAP documentation. Nexperia explicitly states non-automotive qualification in its legal disclaimers; for automotive use, select the AEC-Q101-certified PUMD48-Q series (if available) or equivalent automotive RETs like PBSS4041T.
PUMD48,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Transistor Type:
- 1 NPN, 1 PNP - Pre-Biased (Dual)
- Current - Collector (Ic) (Max):
- 100mA
- Voltage - Collector Emitter Breakdown (Max):
- 50V
- Resistor - Base (R1):
- 47kOhms, 2.2kOhms
- Resistor - Emitter Base (R2):
- 47kOhms
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 80 @ 5mA, 5V / 100 @ 10mA, 5V
- Vce Saturation (Max) @ Ib, Ic:
- 150mV @ 500µA, 10mA / 100mV @ 250µA, 5mA
- Current - Collector Cutoff (Max):
- 1µA
- Frequency - Transition:
- -
- Power - Max:
- 300mW
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSSOP
PUMD48,115 FAQ
1.How can I place an order for PUMD48,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PUMD48,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PUMD48,115 reliable?
The price and inventory of PUMD48,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PUMD48,115 is usually 5 days.
3.What payment methods are accepted for PUMD48,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PUMD48,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PUMD48,115?
PUMD48,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PUMD48,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PUMD48,115?
For technical support, including PUMD48,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PUMD48,115 requirements.
6.How does Aetrix verify that PUMD48,115 is sourced from the original manufacturer or authorized distributors?
All PUMD48,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PUMD48,115 meets industry standards.
7.What is the process for return or replacement of PUMD48,115?
All PUMD48,115 units undergo pre-shipment inspection (PSI). If there is an issue with PUMD48,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PUMD48,115 part is unused and in its original packaging.
Return procedure for PUMD48,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PUMD48,115 Tags

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SMUN5311DW1T1G
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PUMH13,115
Nexperia USA Inc.

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