Nexperia USA Inc. PUMD48/ZLZ

Overview

PUMD48/ZLZ from Nexperia is a resistor-equipped double transistor (RET) integrating one NPN and one PNP silicon bipolar transistor with built-in bias networks in a single SOT363-3 (TSSOP6) package. It delivers 100 mA output current per transistor, supports ±50 V collector-emitter breakdown voltage, and features dual resistor configurations: TR1 (NPN) with R1 = 47 kΩ / R2 = 47 kΩ (R2/R1 ≈ 1), and TR2 (PNP) with R1 = 2.2 kΩ / R2 = 47 kΩ (R2/R1 ≈ 21). It is used for low-current digital signal inversion and IC input control in space-constrained logic interface circuits.

For engineers reviewing the PUMD48/ZLZ datasheet, PUMD48/ZLZ pinout, PUMD48/ZLZ application, or PUMD48/ZLZ equivalent, this page provides verified pin functions, confirmed resistor ratios, measured saturation voltages (VCEsat ≤ 100 mV for TR1, ≤ −100 mV for TR2), thermal resistance (Rth(j-a) = 417 K/W per device), and validated alternatives for dual-transistor logic buffering.

Technical Context

The PUMD48/ZLZ implements two independent bipolar transistors-TR1 as an NPN switch with integrated 47 kΩ base-input and 47 kΩ base-emitter resistors (R2/R1 = 1.0 typ), and TR2 as a complementary PNP switch with 2.2 kΩ input and 47 kΩ feedback resistors (R2/R1 = 21 typ). Both transistors share common ground terminals but operate with opposite polarity drive requirements.

Its internal resistor network eliminates external bias components, enabling direct TTL/CMOS-level input interfacing without pull-up/down resistors. The device operates within −65 °C to +150 °C ambient range, with junction temperature limited to 150 °C and total power dissipation capped at 300 mW on FR4 PCB under free-air conditions.

Key Specifications

Pinout & Package

The PUMD48/ZLZ is housed in a 6-pin SOT363-3 (TSSOP6) surface-mount plastic package measuring 2.2 mm × 1.35 mm × 0.95 mm, with gull-wing leads and pin 1 index marking. Thermal resistance is 417 K/W (junction-to-ambient, per device, FR4 PCB).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-transistor logic interface applications.

Compared with NSVDU2D512PDR2G and EMX13T2R, the PUMD48/ZLZ uniquely combines asymmetric biasing (R2/R1 = 21 for TR2) with full 100 mA rating on both transistors, delivering superior noise immunity and drive strength in bidirectional logic interfacing without external components.

Availability

PUMD48/ZLZ is available at Aetrix Electronics and suitable for LED driver interfaces, digital logic level shifters, microcontroller input conditioners, and push-pull signal generators requiring stable component supply across industrial and consumer production programs.

Supply support for PUMD48/ZLZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance, reliable discrete, logic, and MOSFET solutions for automotive, industrial, and consumer markets.

The PUMD48/ZLZ belongs to Nexperia's Resistor-Equipped Transistor (RET) product line, engineered specifically to replace discrete transistor-resistor combinations in compact digital interface and peripheral driver applications.

FAQ

What is the maximum continuous current each transistor in the PUMD48/ZLZ can handle?

Each transistor (TR1 NPN and TR2 PNP) is rated for a maximum continuous output current of 100 mA under specified thermal conditions (Tamb ≤ 25 °C, FR4 PCB). Derating applies above 25 °C ambient, with total device power dissipation limited to 300 mW. Current capability remains stable down to −40 °C and up to +100 °C junction temperature.

Can the PUMD48/ZLZ be used in a 5 V logic system with 3.3 V microcontroller outputs?

Yes - TR1 (NPN) has VI(on) = 1.6 V typ and VI(off) = 0.8 V typ, allowing reliable turn-on from 3.3 V GPIOs while maintaining noise margin against 5 V rail coupling. TR2 (PNP) responds to inverted logic with VI(on) = −0.75 V typ, supporting direct connection to open-drain or actively driven complementary signals in mixed-voltage domains.

Does the PUMD48/ZLZ require external pull-up or pull-down resistors?

No - the integrated R1 and R2 bias resistors eliminate the need for external base resistors. TR1 uses 47 kΩ input and 47 kΩ emitter resistors (R2/R1 = 1), while TR2 uses 2.2 kΩ input and 47 kΩ emitter resistors (R2/R1 = 21), forming self-biasing networks that ensure defined logic states with no floating inputs.

How does thermal performance differ between per-transistor and per-device ratings?

Per-transistor Rth(j-a) is 625 K/W (free air), but per-device (both transistors combined) is 417 K/W on FR4 PCB - reflecting improved heat spreading across shared package mass. This means total 300 mW device dissipation yields lower average junction temperature than summing individual 200 mW limits, enabling higher aggregate current handling in real layouts.