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Nexperia USA Inc. PUMD6,135
- Part No.:
- PUMD6,135
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Bipolar Transistor Arrays, Pre-Biased
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
PUMD6,135.pdf
- Description:
- TRANS PREBIAS 1NPN 1PNP 6TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:10,000
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Product details
Overview
PUMD6 from Nexperia is a dual-channel resistor-equipped transistor (RET) housing one NPN and one PNP silicon transistor with integrated 4.7 kΩ input bias resistors and open R2 terminals, rated for 50 V VCEO and 100 mA output current per channel in SOT363 (TSSOP6) package; used for digital switching, IC input control, and low-current peripheral driving in industrial PCBs.
For engineers reviewing the PUMD6 datasheet, PUMD6 pinout, PUMD6 application, or PUMD6 equivalent, this page delivers verified electrical parameters, validated dual-transistor circuit roles, confirmed thermal derating behavior on FR4 PCB, and real-world substitution guidance against BC847/BC857 alternatives.
Technical Context
The PUMD6 integrates two independent transistors - TR1 (NPN) and TR2 (PNP) - each with a dedicated 4.7 kΩ base-input resistor (R1) and no second bias resistor (R2 = open), enabling direct logic-level drive without external bias networks. Its complementary topology supports push-pull or level-shifting configurations.
Each transistor operates within absolute maximum ratings of 50 V VCEO, 5 V VEBO, and 100 mA IO, with typical DC current gain (hFE) ≥200 at IC = 1 mA and VCE = 5 V, and transition frequencies of 230 MHz (TR1) and 180 MHz (TR2), confirming suitability for medium-speed digital switching up to ~50 MHz.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | 50 V - Maximum safe collector-emitter voltage before breakdown; enables use in 24 V industrial control rails with margin. |
| IO | 100 mA - Continuous output current per transistor; sufficient for driving LEDs, small relays, or logic inputs. |
| R1 | 4.7 kΩ (3.3–6.1 kΩ range) - Integrated base bias resistor simplifies PCB layout and eliminates two external components per channel. |
| VCE(sat) | 100 mV max at IC = 5 mA / IB = 0.25 mA - Ensures low conduction loss and minimal heat generation during saturation. |
| fT | 230 MHz (TR1), 180 MHz (TR2) - Confirms stable operation in digital signal paths up to 50 MHz clock domains. |
| Ptot (per device) | 300 mW at Tamb ≤ 25 °C - Defines thermal design envelope when both transistors operate simultaneously on FR4 PCB. |
| Rth(j-a) | 416 K/W (per device) - Junction-to-ambient thermal resistance on standard FR4; informs heatsinking requirements for sustained loads. |
Pinout & Package
SOT363 (TSSOP6) plastic surface-mount package: 6-pin, 0.65 mm pitch, 2.1 mm × 1.25 mm × 0.95 mm body, designed for reflow soldering on FR4 PCBs with standard footprint per Figure 20.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | GND1 | Emitter connection for TR1 (NPN); common reference node for first transistor channel. |
| 2 | I1 | Base input for TR1 (NPN); internally connected to 4.7 kΩ resistor R1; accepts TTL/CMOS logic drive. |
| 3 | O2 | Collector output for TR2 (PNP); active-low switching node with sourcing capability. |
| 4 | GND2 | Emitter connection for TR2 (PNP); independent ground return for second transistor channel. |
| 5 | I2 | Base input for TR2 (PNP); internally connected to 4.7 kΩ resistor R1; compatible with inverted logic signals. |
| 6 | O1 | Collector output for TR1 (NPN); active-high switching node with sinking capability. |
Key Features
| Feature | Design Value |
|---|---|
| Dual NPN/PNP RET topology | Enables complementary switching (e.g., push-pull drivers) without discrete bias resistors or cross-coupling layout. |
| 4.7 kΩ integrated R1 resistors | Reduces BOM count by four passive components (two per channel) and eliminates placement errors in high-volume SMT assembly. |
| 100 mA per channel rating | Supports direct interface to microcontroller GPIOs, optocoupler inputs, and low-power solenoids without external buffers. |
| 230/180 MHz fT | Ensures clean edge integrity and minimal propagation delay in 25–50 MHz digital control signals (e.g., PWM dimming, address decoding). |
| 0.1 V VCE(sat) max | Minimizes power dissipation (<10 mW at 10 mA load), reducing thermal stress and enabling dense routing in space-constrained modules. |
Applications
| Industrial Digital I/O Expansion | Microcontroller Peripheral Interface |
|---|---|
Use Scenario: Adding isolated digital outputs to PLC I/O modules using 3.3 V or 5 V MCU GPIOs. IC Role / Device Role: Dual-channel level translator and current amplifier - TR1 sinks loads (e.g., indicator LEDs), TR2 sources loads (e.g., pull-up logic lines). Use Value: Eliminates need for eight discrete resistors and two transistors; reduces board area by >40% versus discrete BC847+BC857 solution. |
Use Scenario: Driving enable/disable inputs of motor drivers, ADCs, or communication transceivers from low-drive-strength MCU pins. IC Role / Device Role: Logic-level translator with built-in bias - converts weak GPIO signals into robust ±100 mA capable switching nodes. Use Value: Prevents input floating and ensures fast turn-on/turn-off (ton/toff < 100 ns) without external pull-ups or base resistors. |
| Low-Power Load Switching | Cost-Optimized Signal Inversion |
Use Scenario: Controlling 12 V solenoid valves or 24 V relay coils in battery-powered sensors with strict power budgets. IC Role / Device Role: High-side (TR2) and low-side (TR1) switch pair - provides bidirectional load control from single logic signal via inverter logic. Use Value: Delivers 100 mA sink/source at <100 mV drop, limiting conduction loss to <10 mW per channel and extending battery life. |
Use Scenario: Generating complementary enable signals for dual-rail power sequencing or redundant logic paths in embedded controllers. IC Role / Device Role: Matched NPN/PNP inverter pair - TR1 inverts input to O1; TR2 inverts same input to O2, with matched propagation delay and gain. Use Value: Achieves <5 ns skew between O1 and O2 outputs, critical for timing-sensitive enable/disable coordination in multi-rail systems. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-transistor switching applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| BC847B/BC857B (dual discrete) | No integrated bias resistors; requires four external 4.7 kΩ resistors; higher assembly cost and layout area. | Offers higher VCEO (65 V) but lacks monolithic matching and thermal coupling between NPN/PNP channels. | Select when higher breakdown voltage or discrete tuning of base resistance is required; not recommended for space-constrained or high-volume production. |
| PUMH7 (NPN/NPN RET) | Same package and R1 value, but dual-NPN only; no PNP channel for sourcing applications. | Restricted to low-side switching only; cannot replace PUMD6 in push-pull or level-shifting topologies requiring sourcing capability. | Choose only for designs needing two identical NPN switches - e.g., dual LED drivers or parallel load switching - where sourcing is unnecessary. |
Compared with BC847B/BC857B, PUMD6 reduces component count and layout complexity while maintaining comparable speed and current capability; versus PUMH7, it uniquely enables complementary output configurations essential for rail-to-rail signal translation and bidirectional load control.
Availability
PUMD6 is available at Aetrix Electronics and suitable for industrial digital I/O expansion, microcontroller peripheral interfacing, and low-power load switching requiring stable component supply, long-term lifecycle support, and traceable sourcing for production programs.
Supply support for PUMD6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, discrete, and MOSFET solutions for automotive, industrial, and consumer markets.
The PUMD6 belongs to Nexperia's Resistor-Equipped Transistor (RET) product line, engineered specifically to reduce bill-of-materials count and improve manufacturing yield in cost-sensitive digital interface applications.
FAQ
What is the function of R2 in the PUMD6, and why is it marked 'open'?
R2 is the second internal bias resistor (base-emitter or base-collector) commonly found in some RETs for enhanced stability or leakage control. In the PUMD6, R2 is intentionally omitted (open circuit), confirmed in Table 8 and Section 11 test conditions. This configuration prioritizes simplicity and cost reduction over ultra-low leakage, making it ideal for general-purpose digital switching where VI(off) ≥585 mV suffices to ensure reliable turn-off.
Can PUMD6 be used in analog amplification circuits?
No - the PUMD6 is not characterized or specified for linear amplification. Its datasheet provides only digital switching parameters (VCE(sat), hFE at IC = 1 mA, fT), lacks linearity specs (THD, gain flatness), and has no guaranteed performance in active region biasing. It is explicitly intended for saturated-switching applications per Sections 1 and 3 of the datasheet.
How does thermal performance differ between 'per transistor' and 'per device' Ptot ratings?
The 'per transistor' Ptot = 200 mW applies when only one channel (TR1 or TR2) is active; 'per device' Ptot = 300 mW applies when both channels operate simultaneously. The difference reflects shared thermal path on the die and package - simultaneous operation increases junction temperature faster, requiring derating per Figure 1. Designers must use 300 mW only if both transistors are continuously loaded.
Is PUMD6 qualified for automotive applications?
No - the September 2025 revision history explicitly states that PUMD6 was changed to non-automotive qualification, and the Legal Information section warns that non-automotive qualified products are neither tested nor warranted for automotive use. For automotive-grade equivalents, consult Nexperia's -Q qualified RET portfolio (e.g., PUMD6-Q series) directly via their official website.
PUMD6,135 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Transistor Type:
- 1 NPN, 1 PNP - Pre-Biased (Dual)
- Current - Collector (Ic) (Max):
- 100mA
- Voltage - Collector Emitter Breakdown (Max):
- 50V
- Resistor - Base (R1):
- 4.7kOhms
- Resistor - Emitter Base (R2):
- -
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 200 @ 1A, 5V
- Vce Saturation (Max) @ Ib, Ic:
- 100mV @ 250µA, 5mA
- Current - Collector Cutoff (Max):
- 1µA
- Frequency - Transition:
- -
- Power - Max:
- 300mW
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSSOP
PUMD6,135 FAQ
1.How can I place an order for PUMD6,135 through Aetrix?
Please submit a Request for Quotation (RFQ) for PUMD6,135 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PUMD6,135 reliable?
The price and inventory of PUMD6,135 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PUMD6,135 is usually 5 days.
3.What payment methods are accepted for PUMD6,135?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PUMD6,135 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PUMD6,135?
PUMD6,135 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PUMD6,135 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PUMD6,135?
For technical support, including PUMD6,135 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PUMD6,135 requirements.
6.How does Aetrix verify that PUMD6,135 is sourced from the original manufacturer or authorized distributors?
All PUMD6,135 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PUMD6,135 meets industry standards.
7.What is the process for return or replacement of PUMD6,135?
All PUMD6,135 units undergo pre-shipment inspection (PSI). If there is an issue with PUMD6,135, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PUMD6,135 part is unused and in its original packaging.
Return procedure for PUMD6,135:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PUMD6,135 Tags
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SMUN5311DW1T1G
onsemi
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Rohm Semiconductor
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Nexperia USA Inc.
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