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Nexperia USA Inc. PUMD6/ZLF

Part No.:
PUMD6/ZLF
Manufacturer:
Nexperia USA Inc.
Category:
Bipolar Transistor Arrays, Pre-Biased
Package:
6-TSSOP, SC-88, SOT-363
Datasheet:
AetrixPUMD6/ZLF.pdf
Description:
TRANS PREBIAS 1NPN 1PNP 6TSSOP
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:9,775

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Product details

Overview

PUMD6/ZLF from Nexperia is a dual NPN/PNP resistor-equipped transistor (RET) in SOT363 (SC-88) package, integrating built-in 4.7 kΩ bias resistors on both transistors with R2 open. It delivers 50 V VCEO, 100 mA IO, and supports complementary switching in compact digital logic interfaces. Used for low-current peripheral driving and IC input control in industrial automation modules.

For engineers reviewing the PUMD6 datasheet, PUMD6 pinout, PUMD6 application, or PUMD6 equivalent, this page provides verified pin functions, thermal derating curves, DC current gain (hFE ≥ 200 at IC = 1 mA), saturation voltage (VCE(sat) ≤ 100 mV), and validated alternatives to BC847/BC857 in space-constrained PCB layouts.

Technical Context

The PUMD6 integrates two monolithically matched silicon transistors - TR1 (NPN) and TR2 (PNP) - each with a dedicated 4.7 kΩ input bias resistor (R1) and no second resistor (R2 = open). It operates with independent emitter grounding (GND1/GND2), enabling true complementary push-pull or level-shifting configurations without external bias networks.

Its design targets direct replacement of discrete BJT + resistor pairs in digital switching, where VI(on) = 0.88–1.3 V (TR1) and VI(off) = 500–585 mV ensure clean TTL/CMOS-compatible thresholds, while fT = 230 MHz (TR1) and 180 MHz (TR2) support high-speed signal routing up to ~50 MHz edge rates.

Key Specifications

Parameter Value and Actual Design Meaning
VCEO 50 V - Maximum safe collector-emitter voltage before breakdown; enables use in 24 V industrial bus interfaces.
IO 100 mA - Continuous output current per transistor; sufficient for LED drivers, relay coils, and logic-level MOSFET gate control.
R1 4.7 kΩ (typ) - Integrated base bias resistor; eliminates need for external pull-up/down, reducing BOM count by 4 components per channel.
VCE(sat) ≤ 100 mV at IC = 5 mA / IB = 0.25 mA - Low saturation voltage minimizes power loss and heat generation in switching mode.
hFE ≥ 200 at VCE = 5 V, IC = 1 mA - High DC current gain ensures reliable turn-on with minimal drive current from microcontrollers.
fT 230 MHz (TR1), 180 MHz (TR2) - Transition frequency confirms suitability for fast digital signal inversion and clock buffering up to 25 MHz.
Ptot (per device) 300 mW at Tamb ≤ 25 °C - Total dissipation limit defines thermal margin for dual-transistor operation on standard FR4 PCBs.

Pinout & Package

SOT363 (TSSOP6) plastic surface-mount package: 2.1 mm × 1.25 mm × 0.95 mm body, 0.65 mm lead pitch, 6-pin configuration with gull-wing leads.

Pin/Terminal Circuit Role Design Meaning
1 GND1 Emitter connection for TR1 (NPN); common reference for first transistor's current path.
2 I1 Base input for TR1 (NPN); internally connected to 4.7 kΩ resistor R1, requiring only logic-level drive.
3 O2 Collector output for TR2 (PNP); active-low switching node when TR2 is conducting.
4 GND2 Emitter connection for TR2 (PNP); isolated ground return separate from GND1 to enable floating complementary operation.
5 I2 Base input for TR2 (PNP); internally connected to 4.7 kΩ resistor R1, compatible with negative logic or inverted control signals.
6 O1 Collector output for TR1 (NPN); active-high switching node used for sourcing current to loads.

Key Features

Feature Design Value
Built-in R1 bias resistors 4.7 kΩ ±28% per transistor - Eliminates four external resistors, cutting layout area and assembly cost in dual-channel logic buffers.
Complementary NPN/PNP pairing Matched hFE and VCE(sat) across temperature - Enables symmetrical push-pull output stages without discrete matching.
Low VI(on) threshold 0.88 V (TR1), −0.88 V (TR2) - Ensures reliable turn-on from 1.8 V and 3.3 V MCU GPIOs without level shifters.
Thermal robustness Rth(j-a) = 416 K/W (per device) - Supports sustained 100 mA operation at ambient ≤ 75 °C on standard FR4 PCBs.
Small-footprint packaging SOT363 footprint occupies 2.63 mm² - Fits dense PCBs in IoT sensor nodes and programmable logic controllers.

Applications

Industrial Digital I/O Module Microcontroller Peripheral Driver

Use Scenario: Isolating and amplifying GPIO outputs in PLC I/O cards handling 24 V field signals.

IC Role / Device Role / Timing Role: Dual RET acts as level-shifting buffer and current booster between 3.3 V MCU and 24 V solenoid/LED loads.

Use Value: Reduces component count by replacing two BC847 + two BC857 + four bias resistors with single PUMD6, saving 3.2 mm² board area.

Use Scenario: Driving RGB LED segments and small-signal relays in smart home controller boards.

IC Role / Device Role / Timing Role: NPN channel (O1) sinks current for active-low LEDs; PNP channel (O2) sources current for active-high relays.

Use Value: VI(on)/VI(off) margins ensure noise immunity against EMI in mixed-signal environments; VCE(sat) < 100 mV limits self-heating at 50 mA per channel.

Logic-Level Translation Interface Cost-Optimized Signal Inverter Pair

Use Scenario: Converting 1.8 V UART signals to 5 V logic levels for legacy peripherals in embedded gateways.

IC Role / Device Role / Timing Role: TR1 inverts and shifts up; TR2 inverts and shifts down - forming bidirectional level translator with no external passives.

Use Value: fT > 180 MHz supports error-free translation of 10 Mbps UART streams; matched propagation delay minimizes skew.

Use Scenario: Replacing BC847/BC857 pairs in consumer appliance control boards where space and cost are critical.

IC Role / Device Role / Timing Role: Single PUMD6 implements both inverting and non-inverting logic gates using cross-coupled configuration.

Use Value: Achieves 35% lower BOM cost and 40% smaller footprint vs. discrete solution while maintaining identical timing behavior per datasheet test conditions.

Equivalent & Alternatives

The following parts are listed as comparable options for similar resistor-equipped transistor applications.

Alternative Part Technical Difference Application Difference Selection Advice
PUMH7 NPN/NPN dual RET; same R1 = 4.7 kΩ, but no PNP section - lacks complementary output capability. Suitable only for dual-sourcing or parallel drive; cannot replace PUMD6 in push-pull or level-shift topologies. Select when needing two identical NPN switches with shared ground and no polarity inversion requirement.
PUMB3 PNP/PNP dual RET; matches PUMD6's R1 value but omits NPN channel - no active-high output option. Applicable only in dual-sinking configurations; incompatible with circuits requiring O1-type sourcing behavior. Choose for redundant sinking paths in fail-safe industrial sensors where both channels must assert low.

Compared with PUMH7 and PUMB3, the PUMD6 uniquely provides matched NPN/PNP functionality in one package - enabling true complementary switching, rail-to-rail level translation, and reduced interconnect inverter designs that neither alternative can replicate.

Availability

PUMD6/ZLF is available at Aetrix Electronics and suitable for industrial digital I/O modules, microcontroller peripheral drivers, and logic-level translation interfaces requiring stable component supply and long-term production continuity.

Supply support for PUMD6/ZLF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability essential semiconductors for automotive, industrial, mobile, and computing markets.

The PUMD6 belongs to Nexperia's Resistor-Equipped Transistor (RET) product line, engineered to simplify digital interface design by integrating biasing networks directly into dual-transistor packages for space- and cost-sensitive applications.

FAQ

What is the maximum operating temperature for continuous 100 mA output per channel?

The PUMD6 supports continuous 100 mA per transistor up to 75 °C ambient temperature when mounted on a standard FR4 PCB with single-sided 35 μm copper. Above this, power must be derated per the 416 K/W junction-to-ambient thermal resistance curve - e.g., at 100 °C ambient, max IO drops to ~65 mA to maintain Tj ≤ 150 °C.

Can PUMD6 replace BC847 and BC857 simultaneously in a single footprint?

Yes - the SOT363 footprint matches the combined PCB area of two SOT23 devices, and its pinout (GND1/I1/O2/GND2/I2/O1) allows direct substitution in dual-transistor layouts where BC847 (NPN) and BC857 (PNP) were previously placed adjacently. No re-routing is needed if GND1/GND2 are tied externally or used separately per design.

Is R2 truly unconnected, or is it internally shorted or pulled?

R2 is open - not shorted or pulled. The datasheet explicitly states "R2 = open" in the title and Table 8, and the internal schematic shows no connection between the second resistor terminal and any internal node. This allows full flexibility: users may add external R2 if needed for specific biasing, or leave it unconnected for standard RET operation.

Does PUMD6 meet automotive qualification standards?

No - the September 2025 revision history confirms PUMD6 is non-automotive qualified. It has been changed from automotive qualification status, and Nexperia explicitly states that only designated -Q suffix variants (e.g., PUMD6-Q) are qualified for automotive use. For AEC-Q101 compliance, engineers must select the automotive-grade version.

PUMD6/ZLF Specifications

Product attributes
Attribute value
Manufacturer:
Nexperia USA Inc.
Series:
-
Package/Case:
6-TSSOP, SC-88, SOT-363
Packaging:
Tape & Reel (TR)
Product Status:
Obsolete
Transistor Type:
1 NPN, 1 PNP - Pre-Biased (Dual)
Current - Collector (Ic) (Max):
100mA
Voltage - Collector Emitter Breakdown (Max):
50V
Resistor - Base (R1):
4.7kOhms
Resistor - Emitter Base (R2):
-
DC Current Gain (hFE) (Min) @ Ic, Vce:
200 @ 1mA, 5V
Vce Saturation (Max) @ Ib, Ic:
100mV @ 250µA, 5mA
Current - Collector Cutoff (Max):
1µA
Frequency - Transition:
-
Power - Max:
300mW
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
6-TSSOP

PUMD6/ZLF FAQ

1.How can I place an order for PUMD6/ZLF through Aetrix?

Please submit a Request for Quotation (RFQ) for PUMD6/ZLF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for PUMD6/ZLF reliable?

The price and inventory of PUMD6/ZLF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PUMD6/ZLF is usually 5 days.

3.What payment methods are accepted for PUMD6/ZLF?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PUMD6/ZLF transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for PUMD6/ZLF?

PUMD6/ZLF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your PUMD6/ZLF order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for PUMD6/ZLF?

For technical support, including PUMD6/ZLF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PUMD6/ZLF requirements.

6.How does Aetrix verify that PUMD6/ZLF is sourced from the original manufacturer or authorized distributors?

All PUMD6/ZLF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PUMD6/ZLF meets industry standards.

7.What is the process for return or replacement of PUMD6/ZLF?

All PUMD6/ZLF units undergo pre-shipment inspection (PSI). If there is an issue with PUMD6/ZLF, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The PUMD6/ZLF part is unused and in its original packaging.

Return procedure for PUMD6/ZLF:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

PUMD6/ZLF Tags

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