Nexperia USA Inc. PUMD9-QF

Overview

PUMD9-Q from Nexperia is a resistor-equipped double transistor (RET) integrating one NPN and one PNP bipolar junction transistor in a single SOT363-3 (TSSOP6) package, rated for 50 V V_CEO, 100 mA output current per transistor, with built-in bias resistors R1 = 10 kΩ and R2 = 47 kΩ; used for digital switching and IC input control in automotive ECUs and industrial sensor interfaces.

For engineers reviewing the PUMD9-Q datasheet, PUMD9-Q pinout, PUMD9-Q application, or PUMD9-Q equivalent, this device serves as a space- and BOM-optimized alternative to discrete BC847-Q/BC857-Q pairs in level-shifting, load switching, and logic interface circuits where AEC-Q101 qualification and thermal robustness up to 150 °C junction temperature are required.

Technical Context

The PUMD9-Q implements two complementary silicon bipolar transistors on one die: TR1 (NPN) features h_FE ≥ 100 at I_C = 5 mA, V_CE = 5 V, and f_T = 230 MHz; TR2 (PNP) delivers h_FE ≥ 100 under identical conditions and f_T = 180 MHz. Both transistors share integrated base bias networks with R1 tolerance ±30 % and R2/R1 ratio 4.7 ±20 %.

It operates within −40 °C to +150 °C ambient range, supports ≤100 mA continuous output per channel, and exhibits V_CE(sat) ≤ 100 mV at I_C = 5 mA / I_B = 0.25 mA (TR1) and ≤ 100 mV at I_C = −5 mA / I_B = −0.25 mA (TR2), enabling low-loss switching in compact power management nodes.

Key Specifications

Pinout & Package

Package: SOT363-3 (TSSOP6), 6-pin surface-mount plastic package with 0.65 mm pitch, 2.2 mm × 1.35 mm footprint, and exposed pad not present.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar resistor-equipped transistor applications.

Compared with PUMH9-Q and PUMB9-Q, the PUMD9-Q uniquely provides matched NPN/PNP pairing in one package-enabling true complementary switching, rail-to-rail level translation, and reduced interconnect in-space-constrained automotive and industrial PCBs.

Availability

PUMD9-Q is available at Aetrix Electronics and suitable for automotive body control modules, industrial sensor interfaces, and consumer appliance power sequencing requiring stable component supply, AEC-Q101 compliance, and long-term lifecycle support.

Supply support for PUMD9-Q includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic devices, with leadership in automotive-qualified components and energy-efficient solutions.

The PUMD9-Q belongs to Nexperia's resistor-equipped transistor (RET) product line, designed specifically to reduce component count and improve manufacturability in automotive and industrial digital switching applications.

FAQ

What is the maximum junction temperature rating for PUMD9-Q?

The PUMD9-Q has a maximum junction temperature (T_j) of 150 °C, validated per AEC-Q101 stress testing. This allows reliable operation in under-hood environments and thermally dense PCB layouts when mounted on FR4 with standard 35 µm copper.

Can PUMD9-Q replace BC847-Q and BC857-Q in existing designs?

Yes-PUMD9-Q directly replaces one BC847-Q (NPN) and one BC857-Q (PNP) in digital switching applications. Its pinout differs, so PCB layout revision is required, but it eliminates four external bias resistors and reduces footprint area by ~40 %.

Is the R1/R2 resistor network accessible externally?

No-the R1 and R2 resistors are monolithically integrated inside the silicon die and not accessible via package terminals. Pins 1–6 connect only to transistor terminals (GND, I, O); no test points or taps exist for the internal bias network.

Does PUMD9-Q support 3.3 V logic-level drive?

Yes-VI(on) is specified at 0.8 V (min) and 1.4 V (max) for TR1 (NPN), and VI(off) is 0.5 V (max) at V_CE = 5 V. This ensures clean turn-on with 3.3 V CMOS outputs and immunity to noise below 0.5 V, meeting standard logic threshold requirements.