Nexperia USA Inc. PUMF11,115

Overview

PUMF11 from NXP Semiconductors is a dual-transistor SOT363 package integrating an NPN resistor-equipped transistor (R1 = 22 kΩ, R2 = 47 kΩ) and a PNP general-purpose transistor, rated for 50 V V_CEO, 100 mA DC collector current per device, and 300 mW total power dissipation. It serves as a compact power management switch in portable electronics such as cellular phones and CD players.

For engineers reviewing the PUMF11 datasheet, PUMF11 pinout, PUMF11 application, or PUMF11 equivalent, key selection criteria include verified bias resistor values (22 kΩ / 47 kΩ), dual-polarity switching capability in one footprint, thermal resistance (416 K/W), and confirmed SOT363 mechanical compatibility with FR4 PCB mounting.

Technical Context

The PUMF11 integrates two functionally distinct transistors: TR1 is an NPN resistor-equipped transistor with built-in base-emitter bias resistors enabling single-pin digital input control, while TR2 is a standalone PNP general-purpose transistor optimized for complementary switching. Both share common thermal limits and operate within −65 °C to +150 °C ambient range.

TR1 exhibits V_i(on) = 1.1 V (typ.) at I_C = 2 mA and V_i(off) = 0.9 V (typ.) at I_C = 100 µA, supporting clean logic-level drive; TR2 delivers h_FE = 120 (min.) at V_CE = −6 V, I_C = −1 mA and V_CE(sat) = −200 mV (max.) at I_C = −50 mA, I_B = −5 mA.

Key Specifications

Pinout & Package

SOT363 (SC-88) plastic surface-mount package: 6-lead, 1.35 mm × 1.15 mm body, 0.65 mm pitch, 1.1 mm height. Designed for FR4 PCB mounting with specified thermal derating above 25 °C ambient.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-transistor switching applications.

Compared with NSVD2001MW6T1G and EMX11T2R, PUMF11 uniquely provides asymmetrical NPN+PNP pairing with logic-level input thresholds and precision 22k/47k bias-making it optimal for compact, mixed-polarity enable/control functions in space-constrained portable designs.

Availability

PUMF11 is available at Aetrix Electronics and suitable for cellular phone power management, CD player regulator enable, and USB peripheral isolation requiring stable component supply across long-lifecycle consumer electronics programs.

Supply support for PUMF11 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer applications.

PUMF11 belongs to NXP's legacy discrete transistor portfolio designed specifically for miniaturized power switching in battery-powered portable equipment-emphasizing PCB area reduction, pick-and-place efficiency, and integrated bias functionality.

FAQ

What is the function of pins 1 and 4 in the PUMF11?

Pins 1 and 4 are the emitters of TR1 (NPN) and TR2 (PNP), respectively. They serve as independent emitter terminals-not internally connected-and must be wired separately: TR1 emitter connects to system ground, TR2 emitter connects to the positive supply rail. This separation enables true complementary switching without shared emitter constraints.

Can the PUMF11 replace two discrete SOT323 transistors in layout?

Yes-the SOT363 footprint (1.35 mm × 1.15 mm) occupies the same PCB area as two adjacent SOT323 devices (each 2.0 mm × 1.25 mm with spacing). Layout migration requires only re-routing of six traces instead of eight, preserving net topology while reducing assembly steps and solder joint count.

What is the maximum safe operating voltage for TR2 (PNP) in linear mode?

TR2's absolute maximum V_CEO is −40 V (not −50 V like TR1), per limiting values table. In linear operation, sustained V_CE beyond −40 V risks permanent degradation. For 50 V rail applications, use TR2 only in saturated switching mode with appropriate base drive to ensure V_CE remains ≤ −200 mV.

How does the 22 kΩ / 47 kΩ resistor ratio affect switching speed?

The R1/R2 ratio (≈2.1) sets the internal base current division for TR1, yielding measured t_on/t_off of 35 ns/60 ns at I_C = 10 mA. This ratio balances turn-on responsiveness against turn-off leakage suppression-deviating from it (e.g., using external resistors) increases propagation delay by ≥25% and raises static current in off-state.