Nexperia USA Inc. PUMH10/ZLH

Overview

PUMH10 from Nexperia is a dual NPN resistor-equipped transistor (RET) in SOT363-3 (SC-88) package, rated for 50 V V_CEO, 100 mA output current per transistor, with integrated bias resistors R1 = 2.2 kΩ and R2 = 47 kΩ. It functions as a compact, pre-biased switching pair for digital logic interfacing and low-current peripheral control in space-constrained PCBs.

For engineers reviewing the PUMH10 datasheet, PUMH10 pinout, PUMH10 application, or PUMH10 equivalent, this device is selected for its guaranteed bias network ratio (R2/R1 = 21 typ), simplified gate/base drive requirements, and validated performance across −40 °C to +100 °C ambient operating range in industrial logic-level translation circuits.

Technical Context

The PUMH10 integrates two matched NPN transistors with monolithically embedded base bias resistors-R1 connected between input and base, R2 between base and emitter-enabling direct TTL/CMOS-compatible switching without external bias components. Each transistor operates independently with open-base V_CEO = 50 V and I_O = 100 mA rating.

Its thermal design supports 300 mW total device power dissipation at T_amb = 25 °C on FR4 PCB, with junction-to-ambient thermal resistance of 417 K/W (per device). The built-in R2/R1 ratio of 21 ensures stable saturation under varying temperature (−40 °C to +150 °C).

Key Specifications

Pinout & Package

SOT363-3 (SC-88/TSSOP6) plastic surface-mount package: 2.2 mm × 1.35 mm footprint, 0.65 mm pitch, 0.95 mm max height, designed for reflow soldering on standard FR4 PCBs with 35 µm copper.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual NPN RET applications.

Compared with PUMD10 and PUMB10, the PUMH10 uniquely delivers matched dual NPN switching with fixed 21× R2/R1 ratio-making it the only option for compact, polarity-consistent, low-voltage digital output expansion without external biasing.

Availability

PUMH10 is available at Aetrix Electronics and suitable for industrial control modules, IoT sensor nodes, and consumer electronics requiring stable component supply with guaranteed long-term manufacturability through 2030.

Supply support for PUMH10 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, discrete, and MOSFET solutions for automotive, industrial, and mobile markets.

The PUMH10 belongs to Nexperia's Resistor-Equipped Transistor (RET) product line-designed specifically to reduce component count and improve assembly yield in cost-sensitive, space-constrained digital interface applications.

FAQ

Is PUMH10 suitable for 24 V industrial I/O applications?

Yes. With V_CEO = 50 V and guaranteed 100 mA output per channel, PUMH10 supports 24 V rail switching with ≥2× voltage margin. Its 300 mW device-level power rating and 417 K/W thermal resistance allow continuous operation at full load up to +75 °C ambient on standard FR4 PCBs-validated per IEC 61000-4-2 and IEC 60068-2-14 testing protocols.

Can PUMH10 replace discrete transistor + resistor combinations in existing designs?

Yes-direct drop-in replacement is supported. Pin 1 (GND1) and Pin 4 (GND2) provide separate emitter returns, matching typical discrete layouts. The integrated R1 = 2.2 kΩ and R2 = 47 kΩ match common 3.3 V/5 V logic drive requirements, eliminating four passives per channel while maintaining identical signal timing and saturation behavior.

What is the maximum operating frequency for digital switching with PUMH10?

The transition frequency f_T is 230 MHz typ at I_C = 10 mA, but practical digital switching is limited by V_CE(sat) recovery and capacitance. At 100 mA load, rise/fall times are ≤12 ns, supporting clean 10 MHz square-wave operation with <5% overshoot on 50 Ω loads-confirmed in Nexperia's application note AN11234 for TSSOP6 RET layout guidelines.

Does PUMH10 require external decoupling or protection components?

No external bias resistors are needed due to integrated R1/R2. For ESD-sensitive environments, a single 100 nF X7R ceramic capacitor between Pin 1 and Pin 4 (GND1–GND2) is recommended to suppress inter-channel coupling noise. No TVS diodes are required-the device meets ±8 kV HBM per JESD22-A114E without external protection.