Nexperia USA Inc. PUMH11,115

Overview

PUMH11 from Nexperia is a dual NPN resistor-equipped transistor (RET) in SOT363-3 (SC-88) package, rated for 50 V V_CEO, 100 mA output current per transistor, with integrated 10 kΩ input bias resistors (R1 = R2 = 10 kΩ). It functions as a compact, pre-biased digital switching pair for low-current logic interfacing and peripheral control in space-constrained PCBs.

For engineers reviewing the PUMH11 datasheet, PUMH11 pinout, PUMH11 application, or PUMH11 equivalent, key selection criteria include verified dual-NPN topology, matched 10 kΩ internal bias network, 6-pin TSSOP layout compatibility, and thermal derating behavior on FR4 PCBs.

Technical Context

The PUMH11 integrates two identical NPN transistors, each with dedicated base-input resistors (R1) and base-to-emitter feedback resistors (R2), enabling direct TTL/CMOS-level drive without external bias components. Its dual-channel architecture supports independent or cascaded switching configurations.

Each transistor exhibits V_CEO = 50 V, I_O = 100 mA, h_FE ≥ 30 at I_C = 5 mA, and V_CE(sat) ≤ 150 mV at I_C = 10 mA / I_B = 0.5 mA - confirming suitability for low-voltage, low-power digital signal routing and level translation.

Key Specifications

Pinout & Package

SOT363-3 (TSSOP6) plastic surface-mount package: 1.3 mm × 2.2 mm footprint, 0.65 mm pitch, 0.95 mm max height, designed for reflow soldering on FR4 PCBs with standard 0.5 mm pad width.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-NPN RET applications.

Compared with PUMB11 and PUMD3, the PUMH11 provides symmetrical dual-NPN behavior ideal for parallel low-side switching, while PUMB11 serves high-side roles and PUMD3 enables complementary output topologies - all share SOT363-3 footprint but differ in bias network and polarity alignment.

Availability

PUMH11 is available at Aetrix Electronics and suitable for LED driver interfaces, microcontroller GPIO expansion, level translation bridges, and low-power sensor interface applications requiring stable component supply and consistent parametric performance across production batches.

Supply support for PUMH11 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance, reliable discrete, logic, and MOSFET solutions for automotive, industrial, and consumer markets.

The PUMH11 belongs to Nexperia's Resistor-Equipped Transistor (RET) product line, engineered specifically to reduce component count and simplify digital interface design in space- and cost-sensitive applications.

FAQ

What is the maximum continuous current per channel of the PUMH11?

The PUMH11 supports 100 mA continuous output current per transistor under recommended operating conditions (T_amb ≤ 75 °C, FR4 PCB). This rating is validated per transistor and assumes proper thermal management - exceeding 100 mA risks thermal runaway due to its 300 mW total device power limit.

Can the PUMH11 be used in a high-side switching configuration?

No - the PUMH11 contains two NPN transistors only, making it suitable exclusively for low-side (sink) switching. For high-side (source) operation, use the PUMB11 (dual PNP) or discrete PNP transistors. Attempting high-side use results in non-functional biasing and potential latch-up.

Are the internal bias resistors laser-trimmed or fixed-value thick-film?

The R1 and R2 resistors are monolithically integrated thick-film elements with ±30% tolerance, not laser-trimmed. Their values (10 kΩ nominal) are process-controlled during wafer fabrication and verified per lot via automated test - no post-package trimming is performed.

Does the PUMH11 require external decoupling capacitors when used with fast-switching logic?

No external decoupling is required for typical digital switching (<10 MHz), as the device has low internal capacitance (C_c ≤ 2.5 pF) and inherent noise immunity from built-in resistive biasing. However, a 100 nF ceramic capacitor near the V_CC rail is recommended if driving inductive loads or operating above 20 MHz.