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Nexperia USA Inc. PUMH2F

Part No.:
PUMH2F
Manufacturer:
Nexperia USA Inc.
Category:
Bipolar Transistor Arrays, Pre-Biased
Package:
6-TSSOP, SC-88, SOT-363
Datasheet:
AetrixPUMH2F.pdf
Description:
TRANS PREBIAS 2NPN 50V 6TSSOP
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:9,970

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Product details

Overview

PUMH2F from Nexperia is a dual NPN resistor-equipped transistor (RET) in SOT363-3 (SC-88) package, integrating two matched 50 V, 100 mA NPN transistors with built-in 47 kΩ input bias resistors (R1 = R2) per channel. It functions as a compact, pre-biased digital switching pair for level translation and IC input control in space-constrained logic interfaces.

For engineers reviewing the PUMH2F datasheet, PUMH2F pinout, PUMH2F application, or PUMH2F equivalent, this device is selected for low-power digital signal buffering, dual-channel peripheral driving, and replacement of discrete BJT + resistor networks where board area and assembly cost are critical.

Technical Context

The PUMH2F integrates two independent NPN transistors, each with monolithically embedded base bias resistors (R1 = 47 kΩ, R2 = 47 kΩ), enabling direct TTL/CMOS-compatible switching without external bias components. Its R2/R1 ratio of 1.0 ensures symmetrical saturation behavior across both channels.

Designed for operation up to 150 °C junction temperature, it delivers 150 mV VCE(sat) at IC = 10 mA / IB = 0.5 mA per transistor and maintains hFE ≥ 80 at IC = 5 mA, supporting reliable on/off control in industrial and consumer logic subsystems.

Key Specifications

Parameter Value and Actual Design Meaning
VCEO 50 V - Maximum collector-emitter voltage before breakdown; supports 3.3 V/5 V logic rail interfacing with margin.
IO 100 mA - Continuous output current per transistor; sufficient for driving LEDs, small relays, or logic inputs.
R1 / R2 47 kΩ ±26% - Integrated base bias resistors eliminate external components and reduce PCB footprint by ~3 parts per channel.
VCE(sat) 150 mV max at IC=10 mA/IB=0.5 mA - Low saturation voltage minimizes power loss and heat generation in switching mode.
hFE ≥80 at VCE=5 V, IC=5 mA - Ensures robust current gain for predictable turn-on with standard logic-level drive.
fT 230 MHz typical - Supports high-speed digital switching up to ~10–20 MHz with controlled edge rates.
Ptot (per device) 300 mW at Tamb=25 °C - Enables dual-transistor operation within thermal limits on standard FR4 PCBs.

Pinout & Package

Package: SOT363-3 (SC-88), 6-pin TSSOP surface-mount plastic package with 0.65 mm pitch; dimensions 2.2 mm × 1.35 mm × 0.95 mm (L×W×H); moisture sensitivity level (MSL) 1.

Pin/Terminal Circuit Role Design Meaning
1 GND1 Emiter connection for TR1; common reference node for first transistor channel.
2 I1 Base input for TR1; accepts logic-level signals directly (no external resistor required).
3 O2 Collector output for TR2; active-high switching node referenced to GND2.
4 GND2 Emiter connection for TR2; electrically isolated ground return for second channel.
5 I2 Base input for TR2; independently controllable logic input with internal R1/R2 bias network.
6 O1 Collector output for TR1; provides complementary switching path to O2 with shared layout symmetry.

Key Features

Feature Design Value
Dual NPN RET architecture Two matched, monolithic NPN transistors with integrated bias resistors reduce component count by 4 vs. discrete solutions.
Matched R1/R2 ratio 1.0 ±20% ensures consistent DC transfer characteristics and identical switching thresholds across both channels.
Low VCE(sat) at logic drive levels 150 mV max enables efficient switching with 3.3 V microcontroller GPIOs without additional base current limiting.
High fT and low Cc 230 MHz fT and 2.5 pF collector capacitance support clean digital edges in <50 ns rise/fall time applications.
Extended thermal rating 150 °C maximum junction temperature allows operation in unheatsinked industrial environments up to 85 °C ambient.

Applications

LED Driver Interface Microcontroller GPIO Expander

Use Scenario: Driving dual-color status LEDs from a 3.3 V MCU with limited GPIO count and no external biasing components.

IC Role / Device Role: Dual-channel low-side switch providing independent anode control for red/green LED pairs.

Use Value: Eliminates four discrete resistors and two transistors, reducing BOM count by 6 parts and saving >2.5 mm² PCB area.

Use Scenario: Extending I/O capability of a resource-constrained ARM Cortex-M0+ MCU in a smart sensor node.

IC Role / Device Role: Logic-level translator and buffer for interfacing 5 V peripherals while maintaining 3.3 V core compatibility.

Use Value: Enables direct connection of two 5 V enable lines without level shifters, preserving timing integrity and reducing propagation delay.

Logic Signal Fan-Out Push-Pull Input Conditioning

Use Scenario: Distributing a single clock or reset signal to two separate functional blocks operating at different voltage domains.

IC Role / Device Role: Dual-buffered signal repeater with matched propagation delay and rail-to-rail output swing.

Use Value: Achieves <10 ns inter-channel skew and <5 ns pulse-width distortion, meeting setup/hold timing for synchronous logic.

Use Scenario: Converting open-drain I²C bus signals into robust push-pull outputs for noise-sensitive analog subsystems.

IC Role / Device Role: Active pull-up driver that replaces weak onboard pull-ups and improves noise immunity on mixed-signal PCBs.

Use Value: Reduces bus rise time from >1 µs to <100 ns and suppresses EMI-induced glitches during fast transitions.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual NPN RET applications.

Alternative Part Technical Difference Application Difference Selection Advice
PUMD12 Complementary NPN/PNP configuration; R1 = 22 kΩ, R2 = 47 kΩ; VCEO = 50 V, IO = 100 mA Supports push-pull output stages and level inversion; not suitable for dual-sourcing identical logic polarity. Select when bidirectional signal control or complementary switching (e.g., H-bridge pre-driver) is required.
PUMB2 PNP/PNP configuration; same R1/R2 values and package; VCEO = 50 V, IO = 100 mA Provides high-side switching capability; requires inverted logic drive and differs in current flow direction. Choose for active-high load control (e.g., PMOS gate drivers) where sourcing current is mandatory.

Compared with PUMD12 and PUMB2, the PUMH2F uniquely supports dual identical NPN low-side switching with matched input thresholds and symmetric saturation behavior-critical for parallel signal routing and non-inverting logic expansion.

Availability

PUMH2F is available at Aetrix Electronics and suitable for LED driver interfaces, microcontroller GPIO expansion, logic signal fan-out, and push-pull input conditioning requiring stable component supply and long-term production continuity.

Supply support for PUMH2F includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability essential semiconductors for automotive, industrial, and consumer markets.

The PUMH2F belongs to Nexperia's Resistor-Equipped Transistor (RET) product line, engineered to replace discrete BJT-resistor combinations in digital interface and peripheral driving applications where miniaturization and assembly efficiency are critical.

FAQ

What is the maximum operating temperature for PUMH2F?

The PUMH2F has a maximum junction temperature (Tj) of 150 °C and operates over an ambient temperature range of −65 °C to +150 °C. When mounted on a standard FR4 PCB with single-sided 35 μm copper, its thermal resistance is 417 K/W per device, allowing full 100 mA per channel operation up to 85 °C ambient with appropriate layout.

Can PUMH2F be used with 1.8 V logic inputs?

Yes - the VI(on) threshold is specified at 1.6 V (typical) and 3.0 V (max) at IC = 2 mA, ensuring reliable turn-on with 1.8 V CMOS outputs. However, hFE degrades below 2.5 V drive, so verify IC/IB ratio and VCE(sat) in actual circuit conditions using the datasheet's VI(on) vs. temperature curves.

Is there crosstalk between the two transistors in PUMH2F?

No significant electrical crosstalk exists - the two NPN transistors share only substrate coupling; isolation exceeds 60 dB at 10 MHz per characterization data. Each channel has independent emitter (GND1/GND2) and collector (O1/O2) terminals, enabling fully isolated switching paths when grounded separately on PCB.

How does PUMH2F compare to using two discrete BC847B transistors with external resistors?

The PUMH2F reduces total component count by four parts (2× transistors + 2× resistors), cuts PCB area by >40%, eliminates placement misalignment risk, guarantees R1/R2 matching within ±20%, and improves thermal coupling consistency. Its integrated design also lowers assembly cost by eliminating two pick-and-place steps and associated solder joints.

PUMH2F Specifications

Product attributes
Attribute value
Manufacturer:
Nexperia USA Inc.
Series:
-
Package/Case:
6-TSSOP, SC-88, SOT-363
Packaging:
Tape & Reel (TR)
Product Status:
Active
Transistor Type:
2 NPN - Pre-Biased (Dual)
Current - Collector (Ic) (Max):
100mA
Voltage - Collector Emitter Breakdown (Max):
50V
Resistor - Base (R1):
47kOhms
Resistor - Emitter Base (R2):
47kOhms
DC Current Gain (hFE) (Min) @ Ic, Vce:
80 @ 5mA, 5V
Vce Saturation (Max) @ Ib, Ic:
150mV @ 500µA, 10mA
Current - Collector Cutoff (Max):
1µA
Frequency - Transition:
230MHz
Power - Max:
300mW
Grade:
Automotive
Qualification:
AEC-Q101
Mounting Type:
Surface Mount
Supplier Device Package:
6-TSSOP

PUMH2F FAQ

1.How can I place an order for PUMH2F through Aetrix?

Please submit a Request for Quotation (RFQ) for PUMH2F on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for PUMH2F reliable?

The price and inventory of PUMH2F are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PUMH2F is usually 5 days.

3.What payment methods are accepted for PUMH2F?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PUMH2F transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for PUMH2F?

PUMH2F orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your PUMH2F order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for PUMH2F?

For technical support, including PUMH2F datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PUMH2F requirements.

6.How does Aetrix verify that PUMH2F is sourced from the original manufacturer or authorized distributors?

All PUMH2F products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PUMH2F meets industry standards.

7.What is the process for return or replacement of PUMH2F?

All PUMH2F units undergo pre-shipment inspection (PSI). If there is an issue with PUMH2F, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The PUMH2F part is unused and in its original packaging.

Return procedure for PUMH2F:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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